Company Filing History:

4 out of 4,791

National Semiconductor Corporation

Virtual Silicon Technology, Inc.

patents

4. 3 out of 832,680

Other

patents

where one patent can have more than one assignee

Years Active: 1976-2009

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10 patents (USPTO):Sort by Forward Citations

Abstract keywords

1. RE40976 - Common source EEPROM and flash memory (2009-11-16),

2. 7332769 - Non-volatile memory arrangement having nanocrystals (2008-02-19),

3. 7075140 - Low voltage EEPROM memory arrays (2006-07-11),

4. 6606265 - Common source EEPROM and flash memory (2003-08-12),

5. 6451652 - Method for forming an EEPROM cell together with transistor for peripheral circuits (2002-09-17),

6. 4224733 - Ion implantation method (1980-09-30),

7. 4047285 - Self-aligned CMOS for bulk silicon and insulating substrate device (1977-09-13),

8. 4047284 - Self-aligned CMOS process for bulk silicon and insulating substrate (1977-09-13),

9. 4043025 - Self-aligned CMOS process for bulk silicon and insulating substrate (1977-08-23),

10. 3983620 - Self-aligned CMOS process for bulk silicon and insulating substrate (1976-10-05),

Title: Innovator Gregorio Spadea: Pioneering Non-Volatile Memory Technologies

Introduction: Gregorio Spadea, an accomplished inventor based in Saratoga, CA, has significantly contributed to the field of semiconductor memory technology. With a total of 10 patents to his name, Spadea's work centers around innovations in non-volatile memory systems, addressing challenges and improving efficiencies in data storage.

Latest Patents: Among his latest patents, Spadea has developed a nonvolatile memory array structured as multiple rows and columns of memory cell transistors. In his detailed design, the sources of these transistors in each row are electrically interconnected. Control gates of transistors related to a specific row connect to a corresponding wordline, while drains are tied to associated bitlines, allowing seamless data retrieval. One of his notable inventions includes a non-volatile memory arrangement featuring nanocrystals that enhances current detection during memory cell reading, offering substantial amplification of the memory cell current. His approach promises minimal increase in array size despite the integration of novel devices that can be used across various types of semiconductor memories, including static random access memories.

Career Highlights: Spadea has built a robust career, showcasing his technical expertise while contributing to prominent organizations like National Semiconductor Corporation. His work has focused on refining technology to meet the increasing demands of modern data storage solutions.

Collaborations: Throughout his career, Spadea has collaborated with industry professionals, including notable coworkers such as Albert M. Bergemont and John M. Caywood. These partnerships have facilitated the exchange of ideas and innovations that have propelled advancements in memory technology.

Conclusion: Gregorio Spadea's contributions to non-volatile memory technologies underscore his status as a leading figure in the field of semiconductor innovations. With a portfolio of patents that demonstrate both creativity and technical prowess, Spadea continues to influence the evolution of memory systems, making lasting impacts on the industry.

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