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For the Inventor, By the Inventor

Portland, OR, United States of America

Gopinath Bhimarasetti

This inventor holds 23 USPTO granted patents and 13 published patent applications and 3 EPO patents, primarily in Semiconductor Fabrication. Top assignees: Intel Corporation, Lam Research Corporation. Active years: 2015-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Gopinath Bhimarasetti. Retrieved from https://idiyas.com/inventor/gopinath-bhimarasetti

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 23 

% Patents Active = 95.7

 

Average Co-Inventor Count = 5.5

ph-index = 3

Forward Citations = 24(Granted Patents)


Company Filing History:

goldMedal22 out of 56,365 
 
Intel Corporation
 patents
silverMedal1 out of 3,953 
 
Lam Research Corporation
 patents

Years Active: 2015-2026

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Areas of Expertise:
Dielectric Materials
Semiconductor Structure
High Voltage Devices
Transistor Isolation
FinFET Device
Edge Placement Errors
Nanowire Counts
eDRAM Transistor
Atomic Layer Deposition
Pore-Filled Dielectric
Selective Oxidation
Sub-Fin Leakage
23 patents (USPTO):Explore Patents
1. 12577666 - Precursor dispensing systems with line charge volume containers for atomic layer deposition (2026-03-17),
2. 12341061 - Bottom-up fill dielectric materials for semiconductor structure fabrication and their methods of fabrication (2025-06-24),
3. 12136628 - High voltage three-dimensional devices having dielectric liners (2024-11-05),
4. 11881486 - High voltage three-dimensional devices having dielectric liners (2024-01-23),
5. 11664274 - Method to repair edge placement errors in a semiconductor device (2023-05-30),
6. 11610917 - High voltage three-dimensional devices having dielectric liners (2023-03-21),
7. 11456372 - Multi-height finfet device by selective oxidation (2022-09-27),
8. 11276760 - Non-planar semiconductor device having omega-fin with doped sub-fin region and method to fabricate same (2022-03-15),
9. 11251201 - High voltage three-dimensional devices having dielectric liners (2022-02-15),
10. 11232980 - Bottom-up fill dielectric materials for semiconductor structure fabrication and their methods of fabrication (2022-01-25),
11. 11227863 - Gate isolation in non-planar transistors (2022-01-18),
12. 10879241 - Techniques for controlling transistor sub-fin leakage (2020-12-29),
13. 10847544 - High voltage three-dimensional devices having dielectric liners (2020-11-24),
14. 10797047 - Gate isolation in non-planar transistors (2020-10-06),
15. 10692888 - High voltage three-dimensional devices having dielectric liners (2020-06-23),

Title: Gopinath Bhimarasetti: Innovator in Semiconductor Technology

Introduction

Gopinath Bhimarasetti is an accomplished inventor based in Portland, OR, renowned for his significant contributions to semiconductor technology. With an impressive portfolio of 21 patents to his name, Gopinath continues to push the boundaries of innovation in his field.

Latest Patents

His latest patents include groundbreaking work on high voltage three-dimensional devices equipped with dielectric liners. These patents detail methods of forming semiconductor structures that incorporate advanced features, such as first and second fin active regions on a substrate. The designs comprise sophisticated gate structures, including gate dielectrics and electrodes, enhancing the performance and reliability of the devices.

Career Highlights

Gopinath is presently affiliated with Intel Corporation, a leading innovator in technology and semiconductor manufacturing. His expertise and inventive spirit contribute significantly to the company's advancements, particularly in the area of high voltage devices.

Collaborations

Throughout his career, Gopinath has collaborated with esteemed colleagues, including Walid M Hafez and Joodong Park. These partnerships underscore his commitment to teamwork and collective innovation, driving forward the frontiers of semiconductor research.

Conclusion

Gopinath Bhimarasetti exemplifies the spirit of innovation in the semiconductor industry. His extensive patent portfolio and collaborative efforts reflect his passion for advancing technology, making significant contributions to the field and shaping the future of high voltage devices.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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