Gary W Tietz

Title: Gary W. Tietz: Clock Recovery and Phase-Locked Loop Innovations.

Introduction

Gary W. Tietz is an inventor based in San Jose, California, whose work includes clock recovery and digital phase-locked loop technologies. He is associated with National Semiconductor Corporation and is credited with 5 patents.

Latest Patents

One of Tietz’s latest patents, “Edge Transition Insensitive Delay Line System and Method,” describes a system for recovering a clock signal from serial data. The system detects rising and falling data transitions, delays the resulting transition signal, and uses gating and phase comparison to generate a correction signal. This process synchronizes the generated clock with transitions in the data signal.

Another patent, “Digital Phase Comparator/Charge Pump with Zero Deadband and Minimum …,” presents a phase detector and charge pump for digital phase-locked loop systems. Its reset circuit responds when the charge pump simultaneously sources and sinks current. The pump-up and pump-down circuits are designed to act quickly and remain balanced, minimizing conduction when the system is phase-locked.

Career Highlights

Tietz’s listed inventions focus on timing and synchronization in digital electronics. His work addresses clock recovery from serial data and phase comparison within digital phase-locked loops, both of which support reliable signal processing.

Collaborations

Tietz’s listed coworkers include Craig M. Davis and David A. Byrd. His association with National Semiconductor Corporation places his patent work within the company’s semiconductor and electronics research.

Conclusion

Gary W. Tietz’s patents reflect a focused contribution to clock recovery and phase-locked loop design, with an emphasis on synchronizing digital signals and improving phase detection.