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For the Inventor, By the Inventor

San Jose, CA, United States of America

Gang Bai

USPTO Granted Patents = 25

Average Co-Inventor Count = 1.8

ph-index = 13

Forward Citations = 612(Granted Patents)


Company Filing History:

goldMedal25 out of 54,750 
 
Intel Corporation
 patents

Years Active: 1998-2016

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25 patents (USPTO):Explore Patents
1. 9412860 - Multi-layer gate dielectric (2016-08-09),
2. 8581353 - Multi-layer gate dielectric (2013-11-12),
3. 8193593 - Multi-layer gate dielectric (2012-06-05),
4. 7187044 - Complementary metal gate electrode technology (2007-03-06),
5. 6998357 - High dielectric constant metal oxide gate dielectrics (2006-02-14),
6. 6794232 - Method of making MOSFET gate electrodes with tuned work function (2004-09-21),
7. 6790731 - Method for tuning a work function for MOSFET gate electrodes (2004-09-14),
8. 6737710 - Transistor structure having silicide source/drain extensions (2004-05-18),
9. 6689702 - High dielectric constant metal oxide gate dielectrics (2004-02-10),
10. 6534837 - Semiconductor device (2003-03-18),
11. 6528856 - High dielectric constant metal oxide gate dielectrics (2003-03-04),
12. 6492217 - Complementary metal gates and a process for implementation (2002-12-10),
13. 6373111 - Work function tuning for MOSFET gate electrodes (2002-04-16),
14. 6365971 - Unlanded vias with a low dielectric constant material as an intraline dielectric (2002-04-02),
15. 6265258 - Method for making a complementary metal gate electrode technology (2001-07-24),

Title: Innovations by Gang Bai: Pioneering Multi-layer Gate Dielectrics

Introduction: Gang Bai is an accomplished inventor based in San Jose, California, with a remarkable portfolio of 25 patents. He is affiliated with Intel Corporation, where he contributes to cutting-edge technological advancements in the field of semiconductor devices. His work primarily focuses on enhancing transistor efficiencies and performance.

Latest Patents: Among Gang Bai's latest contributions to innovation are his patents for the Multi-layer Gate Dielectric technology. This technology comprises a transistor gate dielectric featuring a first dielectric material with a specific dielectric constant, paired with a second dielectric material that has a different dielectric constant. The dual-layer design aims to optimize the electrical performance of transistors in integrated circuits.

Career Highlights: Gang Bai has established himself as a significant figure in the field of semiconductor research and development. His extensive experience at Intel Corporation has allowed him to innovate and provide solutions that address contemporary challenges in technology. His dedication to improving device performance contributes significantly to the overall advancement of the semiconductor industry.

Collaborations: Throughout his career, Gang Bai has collaborated with other notable inventors and engineers, including Chunlin Liang and Brian S. Doyle. These partnerships have fostered an environment of creative problem-solving and have played a key role in the development of new technologies and patents within his company.

Conclusion: Gang Bai's innovative contributions to the field of semiconductor technology illustrate the power of collaboration and creativity in driving progress. With his 25 patents to date and a continued focus on enhancing transistor technology, he remains an influential figure at Intel Corporation and in the broader technology sector. His work exemplifies how dedicated inventors can effect meaningful change and innovation.

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