logo

For the Inventor, By the Inventor

Dallas, TX, United States of America

G R Rao

USPTO Granted Patents = 31

Average Co-Inventor Count = 1.1

ph-index = 15

Forward Citations = 1,059(Granted Patents)


Location History:

  • Plano, TX (US) (1999)
  • Dallas, TX (US) (1995 - 2000)

Company Filing History:

goldMedal25 out of 2,602 
 
Cirrus Logic Inc.
 patents
silverMedal5 out of 23 
 
Silicon Aquarius, Inc.
 patents
bronzeMedal1 out of 1 
 
E Cirrus Logic, Inc.
 patent

Years Active: 1995-2000

Loading Chart...
31 patents (USPTO):Explore Patents
1. 6041389 - Memory architecture using content addressable memory, and systems and (2000-03-21),
2. 6018793 - Single chip controller-memory device including feature-selectable bank (2000-01-25),
3. 6005799 - Methods and circuits for single-memory dynamic cell multivalue data (1999-12-21),
4. 5982696 - Memories with programmable address decoding and systems and methods (1999-11-09),
5. 5963468 - Low latency memories and systems using the same (1999-10-05),
6. 5953738 - DRAM with integral SRAM and arithmetic-logic units (1999-09-14),
7. 5950219 - Memory banks with pipelined addressing and priority acknowledging and (1999-09-07),
8. 5926428 - Memories, systems, and methods using precision sense amplifiers (1999-07-20),
9. 5920885 - Dynamic random access memory with a normal precharge mode and a priority (1999-07-06),
10. 5912853 - Precision sense amplifiers and memories, systems and methods using the (1999-06-15),
11. 5861767 - Digital step generators and circuits, systems and methods using the same (1999-01-19),
12. 5856940 - Low latency DRAM cell and method therefor (1999-01-05),
13. 5835932 - Methods and systems for maintaining data locality in a multiple memory (1998-11-10),
14. 5829016 - Memory system with multiplexed input-output port and systems and methods (1998-10-27),
15. 5761694 - Multi-bank memory system and method having addresses switched between (1998-06-02),

Title: G R Rao: A Pioneer in Memory Architecture Innovations

Introduction: G R Rao is an accomplished inventor based in Dallas, TX, known for his significant contributions to the field of memory architecture. With an impressive portfolio of 31 patents, he has made remarkable advancements that enhance data processing and memory efficiency.

Latest Patents: Among his latest patents, G R Rao has developed innovative technologies such as a memory architecture using content addressable memory. This invention includes a sophisticated system featuring an array of addressable memory cells and a content addressable memory cell designed for efficient comparison of received select bits with stored select bits. This functionality allows for optimized access to the addressed memory cells. Another notable patent is his single chip controller-memory device, which boasts a memory architecture comprising multiple arrays of memory cells. This technology employs addressing circuitry to select specific cells, while feature select circuitry determines the type of access performed, ensuring versatile and efficient data handling.

Career Highlights: Throughout his career, G R Rao has worked with leading companies in the technology sector, including Cirrus Logic Inc. and Silicon Aquarius, Inc. His experiences at these firms have played a vital role in shaping his innovative contributions to memory architecture.

Collaborations: G R Rao has collaborated with esteemed professionals such as Ronald T Taylor and Sudhir Sharma. These collaborations have fostered an environment of innovation and have further enhanced the development of cutting-edge technologies in the memory sector.

Conclusion: G R Rao's dedication to advancing memory architecture through his patents exemplifies his status as a leading inventor in the technology field. His innovative designs continue to influence the landscape of memory systems, reinforcing the crucial role of intellect and creativity in technology advancements.

This text is generated by artificial intelligence and may not be accurate.
Please report any incorrect information to support@idiyas.com
Loading…