Folsom, CA, United States of America

Eshwar Gollapudi

This inventor holds 2 USPTO granted patents. Top assignee: Intel Corporation. Active years: 2004-2006.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Eshwar Gollapudi. Retrieved from https://idiyas.com/inventor/eshwar-gollapudi

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

Average Co-Inventor Count = 6.5

ph-index = 2

Forward Citations = 39(Granted Patents)


Company Filing History:


Years Active: 2004-2006

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2 patents (USPTO):Explore Patents

Title: Eshwar Gollapudi: Integrated Circuit Testing and Interconnect Validation

Introduction

Eshwar Gollapudi is an inventor based in Folsom, California, whose work focuses on testing integrated circuits and validating computer-system interconnects. He is associated with Intel Corporation and holds 2 patents.

Latest Patents

Gollapudi’s patent, “Automatic Self Test of an Integrated Circuit Component via AC I/O Loopback,” describes a method for testing an integrated circuit’s input/output circuitry. The method loads a multi-bit test value into a built-in latch, automatically generates different test-value sequences, and sends signals through a selected pad for loopback. By comparing the original and returned values while adjusting driver or receiver characteristics, the system can assess the operating margin of the on-chip I/O buffer.

His patent, “Push Button Mode Automatic Pattern Switching for Interconnect Built-In Self Test,” concerns built-in self-test systems for computer components and interconnect buses. A test pattern is launched over multiple test cycles, and its pin assignment changes automatically after each cycle. This enables repeated testing or device validation without reprogramming the test unit between cycles.

Career Highlights

Gollapudi’s patented work addresses practical challenges in integrated-circuit testing, including measuring I/O operating margins and simplifying repeated interconnect tests. Both inventions use built-in test capabilities to automate procedures that might otherwise require additional input or reconfiguration.

Collaborations

Gollapudi is associated with Intel Corporation. His listed coworkers include David G. Ellis and Amjad M. Khan.

Conclusion

Eshwar Gollapudi’s two patents highlight contributions to automated integrated-circuit testing and interconnect validation, with an emphasis on efficient, repeatable test procedures.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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