The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 30, 2004
Filed:
Mar. 31, 2003
Applicant:
Inventors:
David G. Ellis, Tualatin, OR (US);
Bruce Querbach, Orangevale, CA (US);
Jay J. Nejedlo, Wilsonville, CA (US);
Amjad Khan, Folsom, CA (US);
Sean R. Babcock, Portland, OR (US);
Eric S. Gayles, Folsom, CA (US);
Eshwar Gollapudi, Folsom, CA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 ;
U.S. Cl.
CPC ...
G11C 7/00 ;
Abstract
A built-in self test (BIST) unit, of a primary integrated circuit (IC) component of a computer system, is programmed or hardwired with a test pattern. The test pattern is launched in multiple test cycles, to test an interconnect bus of the computer system or perform a device validation test of the component. A pin assignment of the pattern is automatically changed after each test cycle, without requiring re-programming of the BIST unit to do so.