Pleasant Valley, NY, United States of America

Douglas J Malone

USPTO Granted Patents = 10 

Average Co-Inventor Count = 3.3

ph-index = 3

Forward Citations = 20(Granted Patents)


Location History:

  • Redondo Beach, CA (US) (1980)
  • Peasant Valley, NY (US) (2021)
  • Pleasant Valley, NY (US) (2006 - 2023)

Company Filing History:


Years Active: 1980-2024

where 'Filed Patents' based on already Granted Patents

10 patents (USPTO):

Title: Innovations of Douglas J Malone

Introduction

Douglas J Malone is a notable inventor based in Pleasant Valley, NY (US). He holds a total of 10 patents, showcasing his significant contributions to the field of technology and innovation. His work primarily focuses on advancements in clock synchronization and chip design.

Latest Patents

One of Malone's latest patents is titled "Phase aligning and calibrating clocks from one phase lock loop (PLL) for a two-chip die module." This invention provides a two-chip die module with minimal chip-to-chip clock skew. The module includes a common substrate with first and second chips that are operably disposed to communicate in parallel. A single phase lock loop (PLL) is integrated within one of the chips to serve as a source for a common clock signal. The PLL ensures that the signals sent to both chips are nearly equal, resulting in synchronized clock sample signals.

Career Highlights

Throughout his career, Malone has worked with prominent companies, including International Business Machines Corporation (IBM). His experience in such a reputable organization has contributed to his expertise in the field of technology and innovation.

Collaborations

Malone has collaborated with notable coworkers such as Andreas H A Arp and Thomas Makowski. These partnerships have likely enhanced his work and led to further advancements in his projects.

Conclusion

Douglas J Malone's contributions to technology through his patents and collaborations highlight his innovative spirit and dedication to advancing the field. His work continues to influence the development of modern chip design and synchronization technologies.

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