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For the Inventor, By the Inventor

Munich, Germany

Dirk Scheideler

This inventor holds 16 USPTO granted patents and 1 published patent application, primarily in Memory Systems. Top assignees: Qimonda Ag, Infineon Technologies Ag, Micron Technology Incorporated. Active years: 1999-2016.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Dirk Scheideler. Retrieved from https://idiyas.com/inventor/dirk-scheideler

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 16 

% Patents Active = 31.3

Average Co-Inventor Count = 4.5

ph-index = 4

Forward Citations = 55(Granted Patents)


Location History:

  • München, DE (2007)
  • Munich, DE (1999 - 2016)

Company Filing History:

goldMedal8 out of 555 
 
Qimonda Ag
 patents
silverMedal2 out of 15,040 
 
Infineon Technologies Ag
 patents
bronzeMedal2 out of 39,294 
 
Micron Technology Incorporated
 patents
4. 1 out of 228 
 
Lantiq Deutschland Gmbh
 patents
5. 1 out of 1 
 
Qimonda
 patent
6. 1 out of 30,893 
 
Siemens Aktiengesellschaft
 patents
7. 1 out of 834,601 
Other
 patents

Years Active: 1999-2016

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Areas of Expertise:
Memory Chip
Bus System
Memory Density
Multi-Die Memory
Integrated Circuit
Wireless Connection
Digital Data Signal
Transceiver
Phase-Locked Loop
Power Saving Mode
Signal Transmission
Frequency Division
16 patents (USPTO):Explore Patents
1. 9508407 - Wiring configuration of a bus system and power wires in a memory chip (2016-11-29),
2. 8724360 - Wiring configuration of a bus system and power wires in a memory chip (2014-05-13),
3. 8271827 - Memory system with extended memory density capability (2012-09-18),
4. 8144755 - Method and apparatus for determining a skew (2012-03-27),
5. 8120958 - Multi-die memory, apparatus and multi-die memory stack (2012-02-21),
6. 8015438 - Memory circuit (2011-09-06),
7. 7936201 - Apparatus and method for providing a signal for transmission via a signal line (2011-05-03),
8. 7928525 - Integrated circuit with wireless connection (2011-04-19),
9. 7920433 - Method and apparatus for storage device with a logic unit and method for manufacturing same (2011-04-05),
10. 7902876 - Method and device for generating a digital data signal and use thereof (2011-03-08),
11. 7782927 - Generating a transmission clock signal and a reception clock signal for a transceiver using an oscillator (2010-08-24),
12. 7721130 - Apparatus and method for switching an apparatus to a power saving mode (2010-05-18),
13. 7405591 - Concept for interfacing a first circuit requiring a first supply voltage and a second supply circuit requiring a second supply voltage (2008-07-29),
14. 7215163 - Method and device for frequency division and demultiplexing (2007-05-08),
15. 7084711 - Method and apparatus for scanning a data signal based on a direction of phase difference (2006-08-01),

Title: Dirk Scheideler - Innovative Inventor from Munich

Introduction: Dirk Scheideler is a renowned inventor based in Munich, Germany, known for his groundbreaking contributions to various industries.

Latest Patents: Dirk Scheideler holds several patents in the fields of technology, healthcare, and sustainability, showcasing his diverse range of expertise and innovative mindset.

Career Highlights: With a career spanning over two decades, Dirk Scheideler has worked with leading research institutions and companies to develop cutting-edge solutions that have revolutionized the way we live and work.

Collaborations: Throughout his career, Dirk Scheideler has collaborated with top universities, multinational companies, and forward-thinking startups to bring his inventions to life and make a positive impact on society.

Conclusion: Dirk Scheideler's passion for innovation and his relentless pursuit of excellence have solidified his reputation as a visionary inventor in Munich and beyond.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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