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For the Inventor, By the Inventor

Boise, ID, United States of America

Diana C Majerus

This inventor holds 16 USPTO granted patents and 6 published patent applications. Top assignees: Micron Technology Incorporated, Lodestar Licensing Group LLC. Active years: 2020-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Diana C Majerus. Retrieved from https://idiyas.com/inventor/diana-c-majerus

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 16 

% Patents Active = 100.0

Average Co-Inventor Count = 3.7

ph-index = 1

Forward Citations = 16(Granted Patents)


Location History:

  • Bosie, ID (US) (2021)
  • Boise, ID (US) (2020 - 2024)

Company Filing History:

goldMedal14 out of 39,222 
 
Micron Technology Incorporated
 patents
silverMedal1 out of 218 
 
Lodestar Licensing Group LLC
 patents
where one patent can have more than one assignee

Years Active: 2020-2025

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16 patents (USPTO):Explore Patents
1. 12361247 - Dynamic machine readable code (2025-07-15),
2. 12321615 - Memory authentication (2025-06-03),
3. 12277809 - Vehicle diagnosis and repair (2025-04-14),
4. 12197550 - Providing access to a computing device (2025-01-14),
5. 12154645 - Pulse detection in microelectronic devices, and related devices, systems, and methods (2024-11-26),
6. 12039385 - Dynamic machine readable code (2024-07-16),
7. 11880574 - Memory authentication (2024-01-23),
8. 11880457 - Device intrusion detection via variable code comparison (2024-01-23),
9. 11837032 - Vehicle diagnosis and repair (2023-12-05),
10. 11814053 - Vehicle occupant emergency monitoring (2023-11-14),
11. 11721410 - Glitch detection in microelectronic devices, and related devices, systems, and methods (2023-08-08),
12. 11580214 - Authentication logging using circuitry degradation (2023-02-14),
13. 11144214 - Memory authentication (2021-10-12),
14. 11139256 - Tamper-resistant integrated circuits, and related methods (2021-10-05),
15. 11074201 - Apparatus with a security mechanism and methods for operating the same (2021-07-27),

Title: Diana C Majerus: Innovator in Machine Readable Code and Memory Authentication

Introduction

Diana C Majerus is a prominent inventor based in Boise, ID (US), known for her significant contributions to technology through her 16 patents. Her work primarily focuses on advancements in machine readable codes and memory authentication, showcasing her innovative spirit and technical expertise.

Latest Patents

Among her latest patents is the "Dynamic Machine Readable Code," which describes a server device capable of generating a machine readable code that conveys information associated with an entity. This invention allows for the modification of the information conveyed by the code based on requests, ensuring secure communication. Another notable patent is related to "Memory Authentication," which outlines methods for authenticating memory devices using authentication codes generated from information stored in a fuse array. This technology enhances the security of memory devices by determining their authenticity through a comparison process.

Career Highlights

Diana C Majerus has made a remarkable impact in her field while working at Micron Technology Incorporated. Her innovative contributions have not only advanced technology but have also set new standards in the industry. Her dedication to research and development has positioned her as a leading figure in her area of expertise.

Collaborations

Diana has collaborated with notable coworkers, including Debra M Bell and Shea M Morrison, further enriching her work environment and fostering innovation through teamwork.

Conclusion

Diana C Majerus exemplifies the spirit of innovation through her patents and contributions to technology. Her work continues to influence the fields of machine readable codes and memory authentication, making her a significant figure in the world of inventions.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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