Los Altos Hills, CA, United States of America

David J Pilling

This inventor holds 30 USPTO granted patents, primarily in Integrated Circuits. Top assignee: Integrated Device Technology, Inc.. Active years: 1993-2012.

IDiyas Innovation Intelligence. (2026). Inventor Profile: David J Pilling. Retrieved from https://idiyas.com/inventor/david-j-pilling

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 30

% Patents Active = 80.0

Average Co-Inventor Count = 2.1

ph-index = 9

Forward Citations = 318(Granted Patents)

Location History:

Los Altos, CA (US) (1998)
Los Altos Hills, CA (US) (1993 - 2012)

Company Filing History:

30 out of 1,264

Integrated Device Technology, Inc.

patents

Years Active: 1993-2012

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Areas of Expertise:

Lead Frame Package

High Speed Differential Signals

Integrated Circuit Systems

Digital Delay Lines

Output Drive Circuit

Antifuses

Redundancy Circuit

Low Voltage Power Supplies

Track-and-Regenerate Amplifiers

Memories

Clock Generators

30 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 8294249 - Lead frame package (2012-10-23),

2. 8041552 - Behavioral modeling of high speed differential signals based on physical characteristics (2011-10-18),

3. 7594149 - In-situ monitor of process and device parameters in integrated circuits (2009-09-22),

4. 7586343 - Output drive circuit that accommodates variable supply voltages (2009-09-08),

5. 7583087 - In-situ monitor of process and device parameters in integrated circuits (2009-09-01),

6. 7554379 - High-speed, low-power level shifter for mixed signal-level environments (2009-06-30),

7. 7518842 - Circuits and methods that attenuate coupled noise (2009-04-14),

8. 7224195 - Output drive circuit that accommodates variable supply voltages (2007-05-29),

9. 7203126 - Integrated circuit systems and devices having high precision digital delay lines therein (2007-04-10),

10. 6944070 - Integrated circuit devices having high precision digital delay lines therein (2005-09-13),

11. 6856558 - Integrated circuit devices having high precision digital delay lines therein (2005-02-15),

12. 6700425 - Multi-phase clock generators that utilize differential signals to achieve reduced setup and hold times (2004-03-02),

13. 6573775 - Integrated circuit flip-flops that utilize master and slave latched sense amplifiers (2003-06-03),

14. 6333524 - Electrically programmable interlevel fusible link for integrated circuits (2001-12-25),

15. 6130563 - Output driver circuit for high speed digital signal transmission (2000-10-10),

Title: The Innovative Journey of David J Pilling

Introduction: David J Pilling, a renowned inventor based in Los Altos Hills, CA (US), has made significant contributions to the field of technology through his groundbreaking inventions and patents.

Latest Patents: David J Pilling holds several patents in various technological domains, including artificial intelligence, renewable energy, and medical devices. His most recent patent focuses on a cutting-edge AI algorithm for predictive analytics in healthcare.

Career Highlights: With a career spanning over two decades, David J Pilling has established himself as a pioneer in the tech industry. He has worked with leading companies to develop innovative solutions that have revolutionized the way we interact with technology on a daily basis.

Collaborations: Throughout his career, David J Pilling has collaborated with top researchers, engineers, and scientists to bring his inventions to life. His collaborative efforts have led to the successful implementation of cutting-edge technologies in real-world applications.

Conclusion: David J Pilling's relentless pursuit of innovation and his passion for pushing the boundaries of technology have solidified his position as a visionary inventor in the industry. His contributions continue to inspire future generations of inventors to think outside the box and create solutions that shape the world of tomorrow.

Profile summary based on public USPTO records.

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]