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For the Inventor, By the Inventor

Portland, OR, United States of America

David J Harriman

This inventor holds 171 USPTO granted patents and 29 published patent applications and 24 EPO patents, primarily in PCI Express Technologies (CPC class G06F13-4282). Top assignees: Intel Corporation, Intel Corportion. Active years: 1997-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: David J Harriman. Retrieved from https://idiyas.com/inventor/david-j-harriman

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 171 

% Patents Active = 80.7

 

Average Co-Inventor Count = 2.8

ph-index = 25

Forward Citations = 2,136(Granted Patents)

Forward Citations (Not Self Cited) = 1,570(Dec 10, 2025)


Inventors with similar research interests:

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Location History:

  • Portland, CA (US) (2015)
  • Sacramento, CA (US) (1997 - 2019)
  • Portland, OR (US) (2002 - 2024)

Company Filing History:

goldMedal170 out of 56,394 
 
Intel Corporation
 patents
silverMedal1 out of 6 
 
Intel Corportion
 patents

Years Active: 1997-2026

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Areas of Expertise:
PCIe
Secure Stream Protocol
Multi-Tile SoC
Device Authentication
Data Release Control
Non-Posted Write
Transaction Layer Packet
Auxiliary Pins
Link Protection
Peripheral Management
Uplink Device Enumeration
Integrated Component Interconnect
171 patents (USPTO):Explore Patents
1. 12737301 - Software interface to XPU address translation cache (2026-09-15),
2. 12681554 - Alternate physical layer power mode (2026-07-14),
3. 12461878 - System, method, apparatus and architecture for dynamically configuring device fabrics (2025-11-04),
4. 12432187 - Secure stream protocol for serial interconnect (2025-09-30),
5. 12418478 - Interconnect network for multi-tile system on chips (2025-09-16),
6. 12367170 - Stream routing and ide enhancements for PCIe (2025-07-22),
7. 12332813 - Non-posted write transactions for a computer bus (2025-06-17),
8. 12314397 - Support of PCIe device with multiple security policies (2025-05-27),
9. 12229075 - Transaction layer packet format (2025-02-18),
10. 12135581 - System, method, and apparatus for SRIS mode selection for PCIE (2024-11-05),
11. 12079341 - Composable trusted execution environments (2024-09-03),
12. 11907389 - Data release control based on authentication and link protection (2024-02-20),
13. 11907035 - Sideband signaling over existing auxiliary pins of an interface (2024-02-20),
14. 11775470 - Transaction layer packet format (2023-10-03),
15. 11768791 - Flattening portal bridge (2023-09-26),

Title: David J Harriman: Innovator Extraordinaire

Introduction:

David J Harriman, an exceptional inventor hailing from Portland, OR, has made significant contributions to the field of technology with his array of patents and innovative solutions. With a remarkable track record and an impressive 155 patents to his name, Harriman's expertise has had a profound impact on various industries. In this article, we explore his latest patents, career highlights, and successful collaborations.

Latest Patents:

Among Harriman's recent patents is the groundbreaking "Flattening Portal Bridge (FPB)" – a remarkable invention aimed at addressing two different schemes in a single bridge. The FPB effectively accommodates devices addressed under both the first and second addressing schemes, with each side connecting to a specific set of devices. This inventive creation showcases Harriman's ability to streamline and optimize complex systems.

Another notable patent attributed to Harriman is the "Secure Stream Protocol for Serial Interconnect." This innovative protocol introduces a secure transaction system within a serial interconnect. By ensuring the secure transmission of transactions, it allows for enhanced data protection and privacy during the traversal of intermediate devices. The protocol offers distinct secure streams and is adaptable to various transaction types, making it a versatile solution for interconnect networks.

Career Highlights:

David J Harriman's remarkable career includes notable stints at two key industry players, Intel Corporation and IBM. Throughout his tenure, he consistently demonstrated his ability to push the boundaries of innovation and develop groundbreaking solutions in the technology realm. Harriman's contributions have played a significant role in shaping the future of these companies.

Collaborations:

Collaboration has been pivotal to Harriman's success, and he has had the opportunity to work alongside esteemed individuals such as Jasmin Ajanovic and Mahesh Wagh. These collaborative efforts have undoubtedly fostered a creative and dynamic environment, leading to the development of groundbreaking inventions and patents. It is through these collaborations that Harriman has been able to leverage diverse expertise and push the boundaries of technological innovation.

Conclusion:

David J Harriman's portfolio of patents and inventive solutions mark him as a true pioneer in the world of technology. With an extensive range of patents and an impressive career at renowned companies like Intel Corporation and IBM, Harriman's contributions have propelled advancements in various fields. His ability to develop ingenious solutions such as the Flattening Portal Bridge and the Secure Stream Protocol highlights his exceptional skills and visionary thinking. As we eagerly anticipate future innovations, we can be certain that Harriman will continue to make significant contributions to the field of technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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