Fair Oaks, CA, United States of America

Dan Nicolaescu

This inventor holds 4 USPTO granted patents. Top assignee: Cadence Design Systems, Inc.. Active years: 2017-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Dan Nicolaescu. Retrieved from https://idiyas.com/inventor/dan-nicolaescu-jwphti7b

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank

% Patents Active = 100.0

Average Co-Inventor Count = 4.9

ph-index = 2

Forward Citations = 13(Granted Patents)


Location History:

  • Kalamazoo, MI (US) (2017)
  • Fair Oaks, CA (US) (2021 - 2022)

Company Filing History:


Years Active: 2017-2025

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4 patents (USPTO):Explore Patents

Title: Dan Nicolaescu: Innovator in Processor Design

Introduction

Dan Nicolaescu is a prominent inventor based in Fair Oaks, CA (US). He has made significant contributions to the field of processor design, holding a total of 4 patents. His work focuses on optimizing instruction sets and integrating hardware accelerators with processors.

Latest Patents

One of Dan's latest patents is titled "Method and apparatus for encoding of processor instruction set." This innovative approach includes an algorithm that automatically encodes a domain-specific processor's instruction set in an optimal manner, resulting in area-effective hardware. The method allows for instruction operands and opcodes to be encoded separately or simultaneously. Additionally, instructions can be grouped and encoded in batches, enhancing efficiency. The decoding logic for control signals is optimized using a logic minimizer, ensuring that each instruction is encoded using an optimal state assignment method.

Another notable patent is "Method, product, and system for integrating a hardware accelerator with an extensible processor." This invention describes a unified language for invoking hardware accelerators and executing instructions. The approach allows for the compilation of these descriptions into various languages for use in tool chains, including simulators. Furthermore, it can be combined with state machine functionality to manage multi-state instruction execution, as well as an external register file for information transfer between the processor and hardware accelerator.

Career Highlights

Dan Nicolaescu is currently employed at Cadence Design Systems, Inc., where he continues to innovate in the field of processor technology. His work has had a significant impact on the efficiency and functionality of modern computing systems.

Collaborations

Dan collaborates with talented individuals such as Rong Chen and He Xiao, contributing to a dynamic and innovative work environment.

Conclusion

Dan Nicolaescu is a key figure in the advancement of processor design, with a focus on optimizing instruction sets and integrating hardware accelerators. His contributions are shaping the future of computing technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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