The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 04, 2025
Filed:
Sep. 09, 2022
Cadence Design Systems, Inc., San Jose, CA (US);
Rong Chen, Fremont, CA (US);
He Xiao, Campbell, CA (US);
Nenad Nedeljkovi, Mountain View, CA (US);
Dan Nicolaescu, Sacremento, CA (US);
James Kim, San Jose, CA (US);
Jiayuan Chen, San Jose, CA (US);
Cadence Design Systems, Inc., San Jose, CA (US);
Abstract
An approach of the present disclosure includes an algorithm to encode an instruction set of a domain-specific processor automatically in an optimal way, and which yields area-effective hardware. Instruction operands and opcodes can be encoded separately or at the same time. Instructions are not encoded one by one but can be encoded in groups, and instructions are grouped automatically. The decoding logic of control signals for each group of instructions, such as register read enable and write enable, is fed to a logic minimizer to obtain an encoding constraint matrix, and the encoding of each instruction in each instruction group is done using an optimal state assignment method.