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For the Inventor, By the Inventor

Hsinchu, Taiwan

Chung-Yu Wang

This inventor holds 7 USPTO granted patents. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2003-2013.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chung-Yu Wang. Retrieved from https://idiyas.com/inventor/chung-yu-wang-usb4mj93

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 7

% Patents Active = 57.1

Average Co-Inventor Count = 2.7

ph-index = 5

Forward Citations = 119(Granted Patents)


Location History:

  • Jung he, TW (2003 - 2004)
  • Hsinchu, TW (2006 - 2013)

Company Filing History:

goldMedal7 out of 42,872 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents

Years Active: 2003-2013

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7 patents (USPTO):Explore Patents
1. 8399269 - LED flip-chip package structure with dummy bumps (2013-03-19),
2. 7662665 - Method for fabricating a semiconductor package including stress relieving layer for flip chip packaging (2010-02-16),
3. 7443010 - Matrix form semiconductor package substrate having an electrode of serpentine shape (2008-10-28),
4. 7112522 - Method to increase bump height and achieve robust bump structure (2006-09-26),
5. 6787926 - Wire stitch bond on an integrated circuit bond pad and method of making the same (2004-09-07),
6. 6782897 - Method of protecting a passivation layer during solder bump formation (2004-08-31),
7. 6528417 - Metal patterned structure for SiN surface adhesion enhancement (2003-03-04),

Title: The Innovative Contributions of Chung-Yu Wang

Introduction

Chung-Yu Wang is an esteemed inventor based in Hsin-Chu, Taiwan, with a remarkable portfolio of seven patents. He is recognized for his significant contributions to the field of semiconductor packaging, particularly in the development of advanced light-emitting device (LED) technologies and fabrication methods.

Latest Patents

Two of Chung-Yu Wang's latest patents illustrate his innovative approach to semiconductor packaging. The first, titled "LED flip-chip package structure with dummy bumps," introduces a unique light-emitting device package component that features an LED chip and carrier chip integration through flip-chip bonding. This design includes a dummy through-substrate via (TSV) which does not conduct current, ensuring efficient performance for the LED chip.

His second patent, "Method for fabricating a semiconductor package including stress relieving layer for flip chip packaging," outlines a comprehensive technique for creating semiconductor packages. This method emphasizes the proper alignment of conductive layers with exposed via plugs, enhancing the reliability of the bonding process and overall package performance.

Career Highlights

Chung-Yu Wang is currently employed at Taiwan Semiconductor Manufacturing Company Limited, where he leverages his expertise to drive innovation in semiconductor technology. His extensive experience and successful patent portfolio position him as a key contributor within his field.

Collaborations

Throughout his career, Chung-Yu has collaborated with notable professionals such as Pei-Haw Tsao and Chender Huang. These partnerships enhance his research and development efforts, fostering an environment of shared knowledge and creativity in technology.

Conclusion

Chung-Yu Wang continues to make significant strides in the technological realm of semiconductor packaging. His innovative patents reflect a commitment to advancing device efficiency and reliability, cementing his reputation as a leader in his field.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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