Chien-Hui Chen

Title: Innovations of Chien-Hui Chen

Introduction

Chien-Hui Chen is a prominent inventor based in Jhu-Dong Township, Taiwan. He has made significant contributions to the field of semiconductor technology, holding a total of 6 patents. His work focuses on systematic physical failure analysis, which is crucial for improving the reliability and performance of semiconductor devices.

Latest Patents

One of Chien-Hui Chen's latest patents involves systems and methods for systematic physical failure analysis (PFA) fault localization. This innovative approach utilizes computational GDS-assisted navigation to accelerate physical fault analysis, enabling the identification of systematic fault locations and patterns. The method includes detecting multiple electrical fault regions across various dies of a semiconductor wafer. Decomposed Graphic Database System (GDS) cross-layer clips are generated, which are associated with these electrical fault regions. Furthermore, a plurality of cross-layer common patterns is identified based on the decomposed GDS cross-layer clips. Normalized differentials are determined for each of these patterns, allowing for the identification of hotspot locations in each die.

Career Highlights

Chien-Hui Chen is currently employed at Taiwan Semiconductor Manufacturing Company Ltd., where he continues to innovate and contribute to advancements in semiconductor technology. His expertise in systematic fault localization has positioned him as a key figure in the industry.

Collaborations

Chien-Hui Chen has collaborated with notable colleagues, including Peng-Ren Chen and Wen-Hao Cheng, to further enhance the development of semiconductor technologies.

Conclusion

Chien-Hui Chen's contributions to the field of semiconductor technology through his innovative patents and collaborative efforts highlight his importance as an inventor. His work continues to influence the industry and improve the reliability of semiconductor devices.