This inventor holds 1 USPTO granted patent. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2006.
Company Filing History:
Years Active: 2006
Title: Chia Hui Hsu: Innovator in Wafer Yield Analysis
Introduction
Chia Hui Hsu is a notable inventor based in Hsinchu, Taiwan. He has made significant contributions to the field of semiconductor manufacturing, particularly in improving wafer yield through innovative analytical methods.
Latest Patents
Chia Hui Hsu holds a patent titled "System and method to analyze low yield of wafers caused by abnormal lot events." This invention introduces an Intelligent Engineering Data Analysis (I-EDA) system designed to prevent low wafer yield and mitigate occurrences of abnormal events. The I-EDA features a non-conforming wafer tracing (NCWT) system that correlates abnormal events with low wafer yield. The method involves several steps, including performing fabrication operations on wafers, determining if abnormal events occurred, and using statistical correlations to analyze and improve the fabrication process.
Career Highlights
Chia Hui Hsu is currently employed at Taiwan Semiconductor Manufacturing Company Limited, a leading firm in the semiconductor industry. His work focuses on enhancing the efficiency and reliability of wafer production processes.
Collaborations
Chia Hui Hsu collaborates with talented colleagues, including Yu-Jye Lan and Shiaw-Lin Chi, who contribute to the innovative environment at their workplace.
Conclusion
Chia Hui Hsu's work in wafer yield analysis exemplifies the importance of innovation in the semiconductor industry. His contributions help to enhance production efficiency and reliability, making a significant impact on the field.