Taichung, Taiwan

Chen-Hsuan Yen

This inventor holds 6 USPTO granted patents and 6 published patent applications. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2021-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chen-Hsuan Yen. Retrieved from https://idiyas.com/inventor/chen-hsuan-yen

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 6 

% Patents Active = 100.0

Average Co-Inventor Count = 2.6

ph-index = 1

Forward Citations = 3(Granted Patents)


Company Filing History:


Years Active: 2021-2026

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6 patents (USPTO):Explore Patents

Title: Chen-Hsuan Yen: Semiconductor and Chip-Package Inventions.

Introduction

Chen-Hsuan Yen is an inventor based in Taichung, Taiwan. The supplied information lists 6 patents and identifies Taiwan Semiconductor Manufacturing Company, Ltd. as her company.

Latest Patents

Yen’s listed recent inventions address semiconductor-device design and chip-package reliability.

“Semiconductor Device and Method of Making” describes a device with conductive structures surrounded by a protective ring. The ring has portions at different elevations, with regions where those portions are not vertically coincident.

“Chip Package Structure and Method for Preventing Warpage of Chip Package Structure” describes a package containing two semiconductor devices, electrically connected through a die-bonding structure. A stress-balance structure within the package carrier is designed to help prevent warpage.

Career Highlights

The supplied patent information highlights Yen’s work on protective structures for semiconductor devices and stress management in chip packaging. Both inventions concern structural approaches to device protection and package stability.

Collaborations

The supplied information names Han-Tang Lo and S. L. Chen as Yen’s coworkers. It does not specify their roles in the listed inventions.

Conclusion

Chen-Hsuan Yen’s listed patents reflect work on semiconductor-device structures and chip-package design, with particular attention to protective rings and warpage prevention.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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