San Jose, CA, United States of America

Chen-an Chen

This inventor holds 4 USPTO granted patents and 5 published patent applications. Top assignees: Applied Materials, Inc., Beijing E-Town Semiconductor Technology, Co., Ltd, Mattson Technology, Inc. Active years: 2016-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Chen-an Chen. Retrieved from https://idiyas.com/inventor/chen-an-chen-grs9xib5

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 4 

% Patents Active = 100.0

Average Co-Inventor Count = 2.9

ph-index = 1

Forward Citations = 2(Granted Patents)


Company Filing History:


Years Active: 2016-2025

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4 patents (USPTO):Explore Patents

Title: Innovations of Chen-an Chen

Introduction

Chen-an Chen is a notable inventor based in San Jose, California. He has made significant contributions to the field of semiconductor processing, holding a total of four patents. His work focuses on advanced methods for depositing amorphous silicon materials and improving temperature control in semiconductor processing chambers.

Latest Patents

One of Chen's latest patents is titled "Remote capacitively coupled plasma deposition of amorphous silicon." This method involves generating a plasma within a plasma unit that is in fluid communication with a process chamber. The plasma is then flowed through an ion suppressor to produce an activated fluid containing reactive and neutral species. This activated fluid either contains no ions or has a lower concentration of ions than the plasma. The method further includes flowing the activated fluid into a first inlet of a dual channel showerhead within the process chamber while a silicon precursor is introduced into a second inlet. Ultimately, this process results in the formation of an amorphous silicon layer on a substrate within the chamber.

Another significant patent is for a "Semiconductor processing apparatus having improved temperature control." This invention features a pedestal for a semiconductor processing chamber, which includes a first body made of ceramic material with encapsulated heater elements. Additionally, a second body, also made of ceramic, has continuously curved grooves formed on its surfaces. The first body is coupled to the second body, enclosing the grooves, which enhances the temperature control during semiconductor processing.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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