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Seoul, South Korea

Byoung-taek Lee

This inventor holds 12 USPTO granted patents. Top assignee: Samsung Electronics Co., Ltd.. Active years: 1998-2006.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Byoung-taek Lee. Retrieved from https://idiyas.com/inventor/byoung-taek-lee

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 12

% Patents Active = 83.3

Average Co-Inventor Count = 1.4

ph-index = 8

Forward Citations = 147(Granted Patents)


Location History:

  • Kyungki-do, KR (1998 - 2001)
  • Seoul, KR (2000 - 2006)

Company Filing History:

goldMedal12 out of 132,108 
 
Samsung Electronics Co., Ltd.
 patents

Years Active: 1998-2006

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12 patents (USPTO):Explore Patents
1. 6998200 - Reflection photomasks with a capping layer and methods for manufacturing the same (2006-02-14),
2. 6828190 - Method for manufacturing capacitor of semiconductor device having dielectric layer of high dielectric constant (2004-12-07),
3. 6699625 - Reflection photomasks including buffer layer comprising group VIII metal, and methods of fabricating and using the same (2004-03-02),
4. 6599806 - Method for manufacturing a capacitor of a semiconductor device (2003-07-29),
5. 6284589 - Method of fabricating concave capacitor including adhesion spacer (2001-09-04),
6. 6261849 - Method of forming integrated circuit capacitors having recessed oxidation barrier spacers and method of forming same (2001-07-17),
7. 6239461 - Semiconductor device capacitor having a recessed contact plug (2001-05-29),
8. 6180970 - Microelectronic devices including ferroelectric capacitors with lower electrodes extending into contact holes (2001-01-30),
9. 6090704 - Method for fabricating a high dielectric capacitor (2000-07-18),
10. 6084765 - Integrated circuit capacitors having recessed oxidation barrier spacers (2000-07-04),
11. 5940705 - Methods of forming floating-gate FFRAM devices (1999-08-17),
12. 5780115 - Methods for fabricating electrode structures including oxygen and (1998-07-14),

Title: Byoung-taek Lee: Innovator in Semiconductor Technology

Introduction

Byoung-taek Lee is a prominent inventor based in Seoul, South Korea. He has made significant contributions to the field of semiconductor technology, holding a total of 12 patents. His innovative work has advanced the manufacturing processes and materials used in modern electronics.

Latest Patents

One of his latest patents is titled "Reflection photomasks with a capping layer and methods for manufacturing the same." This invention involves a reflection photomask that includes a reflection layer on a substrate, an absorber pattern on the reflection layer, and a capping layer designed to decrease the reflectivity of the photomask by less than about 20% of the reflection layer's reflectivity. Another notable patent is the "Method for manufacturing capacitor of semiconductor device having dielectric layer of high dielectric constant." This method outlines the sequential formation of a storage electrode, a high dielectric layer, a plate electrode, and an interdielectric layer over a semiconductor substrate. The process includes two post-annealing steps that enhance the dielectric constant of the high dielectric layer while reducing leakage current.

Career Highlights

Byoung-taek Lee is currently employed at Samsung Electronics Co., Ltd., a leading company in the technology sector. His work at Samsung has allowed him to be at the forefront of semiconductor innovation, contributing to the development of advanced electronic components.

Collaborations

He has collaborated with notable coworkers such as Cheol-Seong Hwang and In-Sung Park, further enhancing the innovative capabilities of his team.

Conclusion

Byoung-taek Lee's contributions to semiconductor technology through his patents and work at Samsung Electronics Co., Ltd. highlight his role as a key innovator in the field. His inventions continue to influence the development of modern electronics.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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