The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 04, 2000

Filed:

Dec. 03, 1998
Applicant:
Inventor:

Byoung-Taek Lee, Seoul, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01G / ;
U.S. Cl.
CPC ...
361311 ; 361303 ; 3613014 ; 3613061 ; 257310 ; 257306 ;
Abstract

Integrated circuit capacitors utilize improved sidewall spacers to protect diffusion barrier layers from parasitic oxidation and capacitor electrodes from being overetched. These sidewall spacers include a composite of a material such as Al.sub.2 O.sub.3 or Ta.sub.2 O.sub.5 which contacts the diffusion barrier layer and another material such as silicon dioxide, silicon nitride or spin-on-glass. A preferred integrated circuit capacitor includes a semiconductor substrate, a first interlayer insulating layer having a contact hole therein, on the substrate, and a polysilicon conductive plug in the contact hole. A first capacitor electrode is also provided on the first interlayer insulating layer and extends opposite the conductive plug. To inhibit oxidation of the conductive plug and chemical reaction between the conductive plug and the first capacitor electrode, a diffusion barrier layer is provided between the first capacitor electrode and the conductive plug. The diffusion barrier layer has a sidewall which is recessed relative to a sidewall of the first capacitor electrode. To inhibit parasitic oxidation of the diffusion barrier layer, a preferred electrically insulating spacer is provided on the recessed sidewall of the diffusion barrier layer. The electrically insulating spacer includes a composite of a first spacer region having a sidewall which is substantially coplanar with a sidewall of the first capacitor electrode and a second spacer region which extends between the first spacer region and the recessed sidewall of the diffusion barrier layer.


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