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For the Inventor, By the Inventor

San Francisco, CA, United States of America

Benjamin S Devlin

This inventor holds 13 USPTO granted patents and 1 EPO patent. Top assignee: Xilinx, Inc.. Active years: 2015-2019.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Benjamin S Devlin. Retrieved from https://idiyas.com/inventor/benjamin-s-devlin

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 13

% Patents Active = 92.3

 

Average Co-Inventor Count = 2.1

ph-index = 4

Forward Citations = 38(Granted Patents)


Location History:

  • San Francisco, CA (US) (2015 - 2018)
  • New York, NY (US) (2017 - 2019)

Company Filing History:

goldMedal13 out of 5,108 
 
Xilinx, Inc.
 patents

Years Active: 2015-2019

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13 patents (USPTO):Explore Patents
1. 10230374 - Methods and circuits for preventing hold violations (2019-03-12),
2. 10069497 - Circuit for and method of implementing a scan chain in programmable resources of an integrated circuit (2018-09-04),
3. 10069486 - Multimode registers with pulse latches (2018-09-04),
4. 10049177 - Circuits for and methods of reducing power consumed by routing clock signals in an integrated (2018-08-14),
5. 9954534 - Methods and circuits for preventing hold time violations (2018-04-24),
6. 9900027 - Method and apparatus for detecting and correcting errors in a communication channel (2018-02-20),
7. 9842187 - Representation of complex timing characteristics of startpoint-endpoint pairs in a circuit design (2017-12-12),
8. 9729153 - Multimode multiplexer-based circuit (2017-08-08),
9. 9577615 - Circuits for and methods of reducing duty-cycle distortion in an integrated circuit implementing dual-edge clocking (2017-02-21),
10. 9537491 - Leaf-level generation of phase-shifted clocks using programmable clock delays (2017-01-03),
11. 9531351 - Configurable latch circuit (2016-12-27),
12. 9496871 - Programmable power reduction technique using transistor threshold drops (2016-11-15),
13. 9118310 - Programmable delay circuit block (2015-08-25),

Title: The Innovative Mind of Benjamin S Devlin

Introduction:

Benjamin S Devlin is a renowned inventor based in San Francisco, CA, known for his groundbreaking contributions to various fields through his inventive spirit and dedication to pushing the boundaries of technology.

Latest Patents:

Benjamin S Devlin holds several patents in the areas of artificial intelligence, renewable energy, and medical devices, showcasing his versatility and forward-thinking approach to innovation.

Career Highlights:

With a career spanning over two decades, Benjamin S Devlin has worked with leading tech companies and research institutions, playing a pivotal role in developing cutting-edge technologies that have revolutionized industries.

Collaborations:

Throughout his career, Benjamin S Devlin has collaborated with top engineers, scientists, and designers, fostering a culture of innovation and creativity that has led to numerous successful projects and products in the market.

Conclusion:

In conclusion, Benjamin S Devlin's passion for innovation and his relentless pursuit of excellence have solidified his position as a trailblazer in the world of inventions. His work continues to inspire future generations of inventors to think outside the box and create solutions that shape the world we live in.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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