The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 14, 2018
Filed:
Jul. 07, 2015
Xilinx, Inc., San Jose, CA (US);
Benjamin S. Devlin, San Francisco, CA (US);
Ilya K. Ganusov, San Jose, CA (US);
XILINX, INC., San Jose, CA (US);
Abstract
A circuit for reducing power consumed by routing clock signals in an integrated circuit is described. The circuit comprises a clock routing network comprising a clock row coupled to receive an input clock signal having a first clock frequency and a plurality of clock branches coupled to the clock row; and a plurality of circuit blocks coupled to the plurality of clock branches, each circuit block having a clock conversion circuit and a register; wherein the clock conversion circuit is programmable to generate clock pulses of an internal clock signal, coupled to the register, having a second frequency that is greater than the first frequency. A method of reducing power consumed by routing clock signals in an integrated circuit is also disclosed.