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For the Inventor, By the Inventor

D.N. Misagv, Israel

Baruch Chaikin

This inventor holds 20 USPTO granted patents and 6 published patent applications and 5 EPO patents, primarily in Cybersecurity Technologies. Top assignee: Intel Corporation. Active years: 2018-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Baruch Chaikin. Retrieved from https://idiyas.com/inventor/baruch-chaikin

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 20 

% Patents Active = 85.0

 

Average Co-Inventor Count = 5.7

ph-index = 4

Forward Citations = 52(Granted Patents)


Location History:

  • Misgav, IL (2019 - 2020)
  • Misagv, IL (2019 - 2023)
  • D.N. Misagv, IL (2018 - 2024)
  • D.N. Misgav, IL (2024)

Company Filing History:

goldMedal20 out of 56,322 
 
Intel Corporation
 patents

Years Active: 2018-2026

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Areas of Expertise:
Trusted I/O
Cryptographic Engine
Virtual Machine Migration
Secure Arbitration
Encryption Keys
Side-Channel Attack Prevention
Memory Encryption
Execution Environments
Address Space Randomization
Processor-Assisted Translation
20 patents (USPTO):Explore Patents
1. 12737480 - Technologies for trusted I/O with a channel identifier filter and processor-based cryptographic engine (2026-09-15),
2. 12554494 - Apparatuses, methods, and systems for instructions to request a history reset of a processor core (2026-02-17),
3. 12248807 - Methods, apparatus, systems, and instructions to migrate protected virtual machines (2025-03-11),
4. 12153665 - Device, system and method to efficiently update a secure arbitration mode module (2024-11-26),
5. 12021980 - Restricting usage of encryption keys by untrusted software (2024-06-25),
6. 11966742 - Apparatuses, methods, and systems for instructions to request a history reset of a processor core (2024-04-23),
7. 11645080 - Apparatuses, methods, and systems for instructions to request a history reset of a processor core (2023-05-09),
8. 11630904 - System, apparatus and method for configurable trusted input/output access from authorized software (2023-04-18),
9. 11461244 - Co-existence of trust domain architecture with multi-key total memory encryption technology in servers (2022-10-04),
10. 11436018 - Apparatuses, methods, and systems for instructions to request a history reset of a processor core (2022-09-06),
11. 11392698 - Active side-channel attack prevention (2022-07-19),
12. 11139967 - Restricting usage of encryption keys by untrusted software (2021-10-05),
13. 11126733 - System, apparatus and method for configurable trusted input/output access from authorized software (2021-09-21),
14. 10789371 - Technologies for trusted I/O with a channel identifier filter and processor-based cryptographic engine (2020-09-29),
15. 10705976 - Scalable processor-assisted guest physical address translation (2020-07-07),

Title: Inventor Baruch Chaikin

Introduction: Baruch Chaikin is a renowned inventor based in D.N. Misagv, Israel, known for his groundbreaking contributions to various fields.

Latest Patents: Baruch Chaikin holds several patents in the areas of technology and engineering, showcasing his innovative mindset and problem-solving abilities.

Career Highlights: Throughout his illustrious career, Baruch Chaikin has been instrumental in developing cutting-edge solutions that have revolutionized industries. His keen eye for detail and passion for innovation have led to the creation of numerous successful inventions.

Collaborations: Baruch Chaikin has collaborated with leading companies, research institutions, and universities worldwide to further his research and bring his ideas to life. His collaborative efforts have resulted in the development of impactful technologies that have shaped the modern world.

Conclusion: In conclusion, Baruch Chaikin stands as a visionary inventor whose dedication to pushing the boundaries of innovation continues to inspire generations of inventors and researchers globally.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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