Salem, MA, United States of America

Axel Siegfried Scherer

This inventor holds 5 USPTO granted patents and 4 published patent applications. Top assignee: Cadence Design Systems, Inc.. Active years: 2011-2013.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Axel Siegfried Scherer. Retrieved from https://idiyas.com/inventor/axel-siegfried-scherer

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 5 

% Patents Active = 100.0

Average Co-Inventor Count = 5.3

ph-index = 4

Forward Citations = 57(Granted Patents)


Location History:

  • Salem, MA (US) (2011 - 2012)
  • Beverly, MA (US) (2013)

Company Filing History:


Years Active: 2011-2013

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5 patents (USPTO):Explore Patents

Title: Innovator Axel Siegfried Scherer: Pioneering Digital Circuit Verification

Introduction

Axel Siegfried Scherer, an accomplished inventor based in Salem, MA, has made significant contributions to the field of digital circuit design and verification. With a remarkable track record of five patents, Scherer is recognized for his innovative approaches that enhance the design verification process.

Latest Patents

Scherer's recent patents demonstrate his deep expertise and inventive spirit. One notable patent is focused on "Verification plans to merging design verification metrics." This invention provides a method and apparatus for creating verification reports for digital circuits by executing multiple verification runs across defined scopes and merging the results into a comprehensive database. Another significant patent is an "Automated debugging method for over-constrained circuit verification environment," offering systems and methods to gather crucial information when circuit evaluations encounter over-constrained events. These patents underline his commitment to advancing digital circuit technology.

Career Highlights

Currently, Scherer is associated with Cadence Design Systems, Inc., where he engages in innovative solutions for the semiconductor and electronics industries. His work has positioned him as a thought leader in verification methodologies, contributing to the efficiency and reliability of integrated circuit designs.

Collaborations

Within Cadence, Scherer collaborates with talented individuals such as Amir Lehavot and Vinaya Kumar Singh, fostering a dynamic environment that promotes creativity and innovation in circuit design and verification. Together, they contribute to pioneering advancements in the field.

Conclusion

Axel Siegfried Scherer stands out as a leading inventor in the realm of digital circuit verification. His patents and collaborative work at Cadence Design Systems underscore his vital role in shaping the future of electronic design technology.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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