Santa Clara, CA, United States of America

Avadhani Shridhar

This inventor holds 16 USPTO granted patents and 4 published patent applications and 2 EPO patents. Top assignees: Ikanos Communications, Inc., Hitachi America, Ltd., Velocity Communication, Inc.. Active years: 1995-2016.

USPTO Granted Patents = 16 (Patent Applications = 4)

% Patents Active = 62.5

EPO Patents = 2 (Patent Applications = 4)

Average Co-Inventor Count = 3.1

ph-index = 9

Forward Citations = 310(Granted Patents)

Location History:

San Bruno, CA (US) (1995)
Sunnyvale, CA (US) (1998 - 1999)
Santa Clara, CA (US) (2002 - 2016)

Company Filing History:

8 out of 168

Ikanos Communications, Inc.

patents

5 out of 169

Hitachi America, Ltd.

patents

3 out of 4

Velocity Communication, Inc.

patents

Years Active: 1995-2016

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16 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 9509518 - Method and apparatus for managing joining events for G.fast vectoring with discontinuous operation (2016-11-29),

2. 9065534 - System and method for partitioning DSL vector cancellation (2015-06-23),

3. 8223859 - Method and apparatus for a multi-tone modem (2012-07-17),

4. 7881362 - Method and apparatus for differentiated communication channel robustness in a multi-tone transceiver (2011-02-01),

5. 7577881 - Method and apparatus for an interleaver (2009-08-18),

6. 7406042 - Method and apparatus for dynamic multi-line bonding in communication systems (2008-07-29),

7. 7315571 - Method and apparatus for a variable bandwidth multi-protocol X-DSL transceiver (2008-01-01),

8. 7028063 - Method and apparatus for a DFT/IDFT engine supporting multiple X-DSL protocols (2006-04-11),

9. 6940807 - Method and apparatus for a X-DSL communication processor (2005-09-06),

10. 6937616 - Method and apparatus for providing packet based and distributed xDSL communications (2005-08-30),

11. 6842429 - Method and apparatus for synchronizing a packet based modem supporting multiple X-DSL protocols (2005-01-11),

12. 6366937 - System and method for performing a fast fourier transform using a matrix-vector multiply instruction (2002-04-02),

13. 5880981 - Method and apparatus for reducing the power consumption in a (1999-03-09),

14. 5815714 - Embedded debug commands in a source file (1998-09-29),

15. 5727194 - Repeat-bit based, compact system and method for implementing (1998-03-10),

Title: Avadhani Shridhar: Pioneering Inventor from Santa Clara

Introduction: Avadhani Shridhar is a distinguished inventor based in Santa Clara, CA, known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Avadhani Shridhar holds several patents in the areas of artificial intelligence, machine learning, and semiconductor technologies, showcasing his continuous commitment to pushing the boundaries of technological advancement.

Career Highlights: With a career spanning over two decades, Avadhani Shridhar has worked with renowned tech companies, leading research institutions, and universities, where he has played a pivotal role in developing cutting-edge solutions that have revolutionized the industry.

Collaborations: Throughout his career, Avadhani Shridhar has collaborated with top-tier engineers, scientists, and researchers, fostering a culture of innovation and knowledge-sharing that has led to the successful implementation of numerous groundbreaking projects.

Conclusion: Avadhani Shridhar's passion for innovation, coupled with his relentless drive to solve complex technological challenges, solidifies his position as a trailblazing inventor whose work continues to inspire and shape the future of technology.