The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 11, 2005

Filed:

Feb. 02, 2001
Applicants:

Avadhani Shridhar, Santa Clara, CA (US);

T. R. Ramesh, Union City, CA (US);

Raminder S. Bajwa, Palo Alto, CA (US);

Masoud Eskandari, San Jose, CA (US);

Firooz Massoudi, Santa Clara, CA (US);

Omprakash S. Sarmaru, Fremont, CA (US);

Behrooz Rezvani, Pleasanton, CA (US);

Inventors:

Avadhani Shridhar, Santa Clara, CA (US);

T. R. Ramesh, Union City, CA (US);

Raminder S. Bajwa, Palo Alto, CA (US);

Masoud Eskandari, San Jose, CA (US);

Firooz Massoudi, Santa Clara, CA (US);

Omprakash S. Sarmaru, Fremont, CA (US);

Behrooz Rezvani, Pleasanton, CA (US);

Assignee:

Ikanos Communications, Inc, Fremont, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04L 1226 ;
U.S. Cl.
CPC ...
Abstract

The current invention provides a digital signal processor which supports multiple X-DSL protocols and a multiplicity of channels on a single chip. Each channel is packetized and each packet includes control information for controlling the performance of the components/modules on the transmit and receive path. Further flexibility is derived from an architecture which incorporates discrete and shared modules on the transmit path and the receive path. The transmit path and receive path modules are collectively controlled by control information in selected ones of the packets and operate on each channel's packets at an appropriate rate, and protocol for the channel. A digital signal processor (DSP) is disclosed which incorporates these features. The DSP exhibits a favorable form factor, and flexibility as to protocols and line codes, and numbers of channels supported.


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