The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 29, 2016

Filed:

May. 20, 2015
Applicant:

Ikanos Communications, Inc., Fremont, CA (US);

Inventors:

Murli Mohan Rao, Fremont, CA (US);

Kevin D. Fisher, Palo Alto, CA (US);

Laurent Francis Alloin, Monmouth Beach, NJ (US);

Avadhani Shridhar, Santa Clara, CA (US);

Assignee:

Ikanos Communications, Inc., Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04J 1/12 (2006.01); H04L 12/12 (2006.01); H04B 3/32 (2006.01); H04L 5/14 (2006.01); H04M 11/06 (2006.01);
U.S. Cl.
CPC ...
H04L 12/12 (2013.01); H04B 3/32 (2013.01); H04L 5/1469 (2013.01); H04M 11/062 (2013.01);
Abstract

In general, the present invention provides an efficient usage of Far End Crosstalk (FEXT) coefficient memory in a G.fast vectoring system. According to certain aspects, embodiments of the invention provide a simple scheme for efficient management of the Discontinuous (DO) and Regular Operation (RO) FEXT coefficient memories to handle the complexity of lines joining/leaving the system in both regular and DO groups. In embodiments, by disabling the power-efficient, Discontinuous Operation, a G.fast system according to the invention first frees up the DO coefficient memory. Next, the system uses this memory as the staging area to manage joining/leaving events. Finally the system re-enables to the power-efficient Discontinuous Operation and re-populates the DO coefficient memory.


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