Moskovskaya oblast, Russia

Andrej A Zolotykh

This inventor holds 24 USPTO granted patents, primarily in Integrated Circuit Design. Top assignees: Lsi Logic Corporation, Lsi Corporation. Active years: 2002-2012.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Andrej A Zolotykh. Retrieved from https://idiyas.com/inventor/andrej-a-zolotykh

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile


% Patents Active = 58.3

Average Co-Inventor Count = 3.8

ph-index = 8

Forward Citations = 175(Granted Patents)


Location History:

  • Moskovaskaya Oblast, RU (2002)
  • Fryazino, Moskovskaya Oblast, RU (2004)
  • Moskovskaya, RU (2004 - 2006)
  • Moskovskaya Oblast, RU (2002 - 2009)
  • Fryazino, RU (2003 - 2009)
  • Moscow, RU (2012)

Company Filing History:


Years Active: 2002-2012

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Areas of Expertise:
Secure Hash Techniques
Logic Restructuring
Global Routing
Buffer Insertion
Timing Optimization
IC Design
Cell Placement
Boolean Function Symmetries
Engineering Change Orders
Resynthesis
Critical Netlist Area
Clock Tree Synthesis
24 patents (USPTO):Explore Patents

Title: **Andrej A Zolotykh: An Innovator in Secure Hash Techniques and Ramptime Propagation**

Introduction

Andrej A Zolotykh, located in Moskovskaya oblast, Russia, is a prolific inventor with an impressive portfolio of 24 patents. His work primarily focuses on advancements in secure hashing techniques and ramptime propagation for integrated circuits, showcasing his significant contributions to the field of electronics.

Latest Patents

Among his latest patents, Zolotykh has developed an "Efficient implementation of arithmetical secure hash techniques." This apparatus features an initialization circuit designed to present various initialization values, along with a hash computation circuit that generates hash values for messages in response to padded message blocks. Notably, the hash computation circuit employs a diagonal cut technique that utilizes values from multiple cycle rounds within a single cycle.

Another significant patent is titled "Ramptime propagation on designs with cycles." This method and apparatus focus on calculating ramptime propagation for integrated circuit layout patterns, specifically involving pins interconnected in an oriented graph with closed loops. The innovative process allows for iterative calculation of ramptime values for pins in closed loops, enhancing the efficiency of integrated circuit designs.

Career Highlights

Andrej Zolotykh has a noteworthy career, having worked with leading companies in the field. He has been associated with LSI Logic Corporation and LSI Corporation, where his expertise significantly contributed to the development of pioneering technologies.

Collaborations

Throughout his career, Zolotykh has collaborated with several prominent professionals, including Elyar Eldarovich Gasanov and Aiguo Lu. These partnerships have resulted in innovations that have helped shape the electronics landscape, leading to enhanced design techniques and better computational methodologies.

Conclusion

With a remarkable collection of patents and a strong professional background, Andrej A Zolotykh continues to push the boundaries of innovation in secure hashing and integrated circuit design. His work not only exemplifies the potential of modern technologies but also sets the stage for future advancements in the field.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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