The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6701503 B1

PDF
Full Text
Expired
Date of Patent:
Mar. 02, 2004

Filed:

Feb. 07, 2002
Applicant:
Inventors:

Andrey A. Nikitin, Moscow, RU;

Elyar E. Gasanov, Moscow, RU;

Andrej A. Zolotykh, Moskovskaya Oblast, RU;

Assignee:

LSI Logic Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/45 ;
U.S. Cl.
CPC ...
G06F 9/45 ;
Abstract

The present invention is directed to a system and method for providing an overlap remover manager. A method for removing overlaps in a circuit design for an integrated circuit may include initiating an overlap remover manager, wherein the overlap remover manager is suitable for moving cells of an integrated circuit design to remove cell overlaps. A search for critical wires is performed and a determination is made of which violated moves of cells caused at least one critical wire. A determined violated move of the cells is rolled back and the overlap remover manager employed to remove overlaps between rolled back cells.


Find Patent Forward Citations

Nikitin, Andrey. (2004). Overlap remover manager (U.S. Patent No. 6701503). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6701503

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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