The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 05, 2006
Filed:
Nov. 19, 2004
Iliya V. Lyalin, Moscow, RU;
Andrej A. Zolotykh, Moskovskaya, RU;
Elyar E. Gasanov, Moscow, RU;
Alexei V. Galatenko, Moscow, RU;
Iliya V. Lyalin, Moscow, RU;
Andrej A. Zolotykh, Moskovskaya, RU;
Elyar E. Gasanov, Moscow, RU;
Alexei V. Galatenko, Moscow, RU;
LSI Logic Corporation, Milpitas, CA (US);
Abstract
The present disclosure is directed to a method of selecting cells in an integrated circuit for logic restructuring of an original design. The original design includes a set of parameters. The method includes forming a restructuring set that will include the selected cells for logic restructuring, and a candidate set. The restructuring set includes restructuring cells with an initial cell. The restructuring set is adapted to accept additional cells identified as restructuring cells. The candidate set is adapted to include candidate cells, where each candidate cell in the candidate set is connected to at least one of the restructuring cells in the restructuring set. The candidate set is adapted to remove candidate cells from the candidate set. The restructuring set is adapted to accept selected removed candidate cells as identified restructuring cells if a corresponding parameter is included in the set of parameters.