logo

For the Inventor, By the Inventor

Dallas, TX, United States of America

Agerico L Esquivel

This inventor holds 15 USPTO granted patents. Top assignees: Texas Instruments Corporation, Other. Active years: 1987-2001.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Agerico L Esquivel. Retrieved from https://idiyas.com/inventor/agerico-l-esquivel

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 15

% Patents Active = 100.0

Average Co-Inventor Count = 1.9

ph-index = 11

Forward Citations = 527(Granted Patents)


Company Filing History:

goldMedal14 out of 29,888 
 
Texas Instruments Corporation
 patents
silverMedal1 out of 834,513 
Other
 patents

Years Active: 1987-2001

Loading Chart...
15 patents (USPTO):Explore Patents
1. 6201277 - Slot trench isolation for flash EPROM (2001-03-13),
2. 5306935 - Method of forming a nonvolatile stacked memory (1994-04-26),
3. 5084418 - Method of making an array device with buried interconnects (1992-01-28),
4. 5053839 - Floating gate memory cell and device (1991-10-01),
5. 5045490 - Method of making a pleated floating gate trench EPROM (1991-09-03),
6. 5028553 - Method of making fast, trench isolated, planar flash EEPROMS with (1991-07-02),
7. 5008722 - Non-volatile memory (1991-04-16),
8. 4979004 - Floating gate memory cell and device (1990-12-18),
9. 4977439 - Buried multilevel interconnect system (1990-12-11),
10. 4951103 - Fast, trench isolated, planar flash EEPROMS with silicided bitlines (1990-08-21),
11. 4905062 - Planar famos transistor with trench isolation (1990-02-27),
12. 4892840 - EPROM with increased floating gate/control gate coupling (1990-01-09),
13. 4855800 - EPROM with increased floating gate/control gate coupling (1989-08-08),
14. 4833514 - Planar FAMOS transistor with sealed floating gate and DCS+N.sub.2 O oxide (1989-05-23),
15. 4698900 - Method of making a non-volatile memory having dielectric filled trenches (1987-10-13),

Title: Agerico L Esquivel: Innovator in Memory Technology

Introduction

Agerico L Esquivel is a prominent inventor based in Dallas, TX (US). He has made significant contributions to the field of memory technology, holding a total of 15 patents. His work has advanced the development of programmable memory devices, showcasing his expertise and innovative spirit.

Latest Patents

Among his latest patents is the "Slot trench isolation for flash EPROM," which describes a programmable memory device featuring slot trenches that isolate memory cells from each other. This design includes a plurality of floating gates separated from the surface of the semiconductor body by a gate dielectric. Another notable patent is the "Method of forming a nonvolatile stacked memory," which details a nonvolatile memory array with two or more stacked layers of memory cells. This innovative structure allows for a two-fold increase in memory density without scaling the device sizes.

Career Highlights

Agerico has worked with Texas Instruments Corporation, where he contributed to various projects that pushed the boundaries of memory technology. His experience in this leading technology company has played a crucial role in shaping his career and innovations.

Collaborations

Throughout his career, Agerico has collaborated with notable professionals in the field, including Allan T Mitchell and Howard L Tigelaar. These collaborations have enriched his work and contributed to the advancement of memory technology.

Conclusion

Agerico L Esquivel stands out as a key figure in the innovation of memory devices, with a strong portfolio of patents and a history of impactful collaborations. His contributions continue to influence the technology landscape, making him a noteworthy inventor in the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…