For the Inventor, By the Inventor

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Sunnyvale, CA, United States of America

Monolithic Memories, Inc.

USPTO Granted Patents = 40

Forward Citations = 1,127

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46 inventors (with patents filed for the assignee):

Mark E Fitzpatrick (8 out of 30 patents)

Albert L Chan (8 out of 8 patents)

Cyrus Y Tsui (8 out of 8 patents)

4. John M Birkner (6 out of 24 patents)

5. Andrew K Chan (5 out of 48 patents)

6. Sing Y Wong (5 out of 7 patents)

7. Robert J Bosnyak (5 out of 5 patents)

8. Barry Alan Hoberman (4 out of 36 patents)

9. William E Moss (4 out of 11 patents)

10. Ury Priel (4 out of 12 patents)

11. Jerry D Gray (4 out of 4 patents)

12. Allen H Frederick (4 out of 6 patents)

13. Hua-Thye Chua (3 out of 23 patents)

14. Hua T Chua (3 out of 5 patents)

15. Gary Gouldsberry (3 out of 3 patents)

Core Competencies:

Programmable Logic Array

Integrated Circuit

Emitter-Coupled Logic

Fusible Link

High-Speed PROM

Memory Cell

Diagnostic Circuit

Synchronous Sequential State Machine

FIFO Memory

Asynchronous Register

Bipolar Integrated Circuit

CMOS Devices

40 patents: Sort by Forward Citations

1. 4814646 - Programmable logic array using emitter-coupled logic (1989-03-21),

2. 4758746 - Programmable logic array with added array of gates and added output (1988-07-19),

3. 4755967 - Programmable synchronous sequential state machine or sequencer having (1988-07-05),

4. 4754317 - Integrated circuit die-to-lead frame interconnection assembly and method (1988-06-28),

5. 4740485 - Method for forming a fuse (1988-04-26),

6. 4725979 - Emitter coupled logic circuit having fuse programmable latch/register (1988-02-16),

7. 4721682 - Isolation and substrate connection for a bipolar integrated circuit (1988-01-26),

8. 4701695 - Short detector for PROMS (1987-10-20),

9. 4698525 - Buffered Miller current compensating circuit (1987-10-06),

10. 4684830 - Output circuit for a programmable logic array (1987-08-04),

11. 4684826 - Programmable asynchronous register initialization circuit (1987-08-04),

12. 4670708 - Short detector for fusible link array using a pair of parallel connected (1987-06-02),

13. 4654830 - Method and structure for disabling and replacing defective memory in a (1987-03-31),

14. 4646269 - Multiple programmable initialize words in a programmable read only memory (1987-02-24),

15. 4645953 - Current source which saves power in programmable logic array circuitry (1987-02-24),

Company Overview

Monolithic Memories, Inc., based in Sunnyvale, California, specializes in the development and manufacturing of advanced integrated circuits and digital systems. The company focuses on innovative technologies such as programmable logic arrays, emitter coupled logic, and high-speed memory solutions. With expertise in CMOS devices and asynchronous registers, Monolithic Memories plays a significant role in the semiconductor industry, providing critical components for various applications in electronics and computing.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 20 2026

40 Patents

#115 in Sunnyvale, CA

#2,041 in California

#8,635 in US

#17,087 in the World

Sunnyvale, CA, United States of America

Monolithic Memories, Inc.

Forward Citations = 1,127

46 inventors:

Mark E Fitzpatrick (8 out of 30 patents)

Albert L Chan (8 out of 8 patents)

Cyrus Y Tsui (8 out of 8 patents)

4. John M Birkner (6 out of 24 patents)

5. Andrew K Chan (5 out of 48 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Monolithic Memories, Inc.. Retrieved from https://idiyas.com/company/monolithic-memories

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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