The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 16, 1988

Filed:

Dec. 05, 1986
Applicant:
Inventor:

Barry A Hoberman, Mountain View, CA (US);

Assignee:

Monolithic Memories, Inc., Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365 96 ; 365179 ; 307455 ;
Abstract

An emitter coupled logic circuit includes a bypass circuit which provides a conductive path for current when a programmable fuse is blown, so that input data is transmitted independently of the state of a clock signal. In one implementation, the circuit takes a register configuration having a master section and a slave section, each incorporating a programmable fuse. When the fuse in just one section is intact, the circuit serves as a clocked latch. When both fuses are blown, the bypass circuit is enabled so that the register functions as a combinatorial circuit which produces an output signal dependent on the input signal without reference to a clock signal.


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