For the Inventor, By the Inventor

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Milpitas, CA, United States of America

Kovio, Inc.

Calculating rank

USPTO Granted Patents = 78

% Expired Patents = 44.9

CIPO Patents = 3

EPO Patents = 2

Forward Citations = 1,034

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43 inventors (with patents filed for the assignee):

Joerg Rockenberger (46 out of 59 patents)

Brent Ridley (26 out of 40 patents)

James Montague Cleeves (26 out of 146 patents)

4. Wenzhuo Guo (21 out of 40 patents)

5. Klaus Kunze (19 out of 72 patents)

6. Fabio R Zurcher (17 out of 48 patents)

7. Patrick Smith (16 out of 61 patents)

8. Arvind Kamath (16 out of 57 patents)

9. Vladimir K Dioumaev (16 out of 30 patents)

10. Fabio Zürcher (14 out of 17 patents)

11. Scott T Haubrich (12 out of 36 patents)

12. Vivek Subramanian (10 out of 70 patents)

13. Mao Takashima (10 out of 14 patents)

14. Erik C Scher (9 out of 101 patents)

15. J Devin MacKenzie (7 out of 16 patents)

Core Competencies:

Thin Film Transistors

Semiconductor Compositions

Non-Volatile Memory

Printed Electronics

Dopant Layers

Silane Compositions

Electronic Circuits

Capacitors

RFID Tags

Nanoparticles

Metal Inks

Integrated Circuits

78 patents: Sort by Forward Citations

1. 8796125 - Printed, self-aligned, top gate thin film transistor (2014-08-05),

2. 8624049 - Dopant group-substituted semiconductor precursor compounds, compositions containing the same, and methods of making such compounds and compositions (2014-01-07),

3. 8617992 - Method of forming metal silicide contact and metal interconnect (2013-12-31),

4. 8603426 - Method of making a silicon-containing film (2013-12-10),

5. 8530589 - Print processing for patterned conductor, semiconductor and dielectric materials (2013-09-10),

6. 8471308 - Process-variation tolerant series-connected NMOS and PMOS diodes, and standard cells, tags, and sensors containing the same (2013-06-25),

7. 8461628 - MOS transistor with laser-patterned metal gate, and method for making the same (2013-06-11),

8. 8461284 - Silicon polymers, methods of polymerizing silicon compounds, and methods of forming thin films from such silicon polymers (2013-06-11),

9. 8460983 - Method for modifying and controlling the threshold voltage of thin film transistors (2013-06-11),

10. 8455604 - Polysilane compositions, methods for their synthesis and films formed therefrom (2013-06-04),

11. 8446706 - High precision capacitors (2013-05-21),

12. 8426905 - Profile engineered, electrically active thin film devices (2013-04-23),

13. 8424176 - Methods of forming tunable capacitors (2013-04-23),

14. 8397198 - Field configured electronic circuits and methods of making the same (2013-03-12),

15. 8383952 - Printed compatible designs and layout schemes for printed electronics (2013-02-26),

Company Overview

Kovio, Inc., based in Milpitas, California, specializes in the development of printed electronics, focusing on innovative technologies such as thin film transistors and semiconductor compositions. The company is dedicated to advancing non-volatile memory solutions and electronic circuits, leveraging unique materials like dopant layers and silane compositions. Kovio's expertise in capacitors and printed electronics positions it at the forefront of the evolving landscape of electronic device manufacturing, contributing to the future of flexible and efficient electronic systems.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 27 2026

78 Patents

#31 in Milpitas, CA

#1,101 in California

#4,747 in US

#9,691 in the World

Milpitas, CA, United States of America

Kovio, Inc.

Forward Citations = 1,034

43 inventors:

Joerg Rockenberger (46 out of 59 patents)

Brent Ridley (26 out of 40 patents)

James Montague Cleeves (26 out of 146 patents)

4. Wenzhuo Guo (21 out of 40 patents)

5. Klaus Kunze (19 out of 72 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Kovio, Inc.. Retrieved from https://idiyas.com/company/kovio

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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