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Paderborn, Germany

Dspace Digital Signal Processing and Control Engineering Gmbh

Calculating rank

USPTO Granted Patents = 166

% Expired Patents = 7.8

EPO Patents = 81

Trademarks = 11

Forward Citations = 299

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173 inventors (with patents filed for the assignee):

Heiko Kalte (15 out of 25 patents)

Thorsten Hufnagel (11 out of 12 patents)

Marc Dressler (11 out of 14 patents)

4. Dominik Lubeley (10 out of 21 patents)

5. Wolfgang Trautmann (9 out of 9 patents)

6. Robert Leinfellner (8 out of 8 patents)

7. Dirk Hasse (7 out of 7 patents)

8. Michael Mair (7 out of 10 patents)

9. Martin Kronmueller (7 out of 7 patents)

10. Robert Polnau (7 out of 7 patents)

11. Bastian Kellers (6 out of 7 patents)

12. Matthias Klemm (5 out of 5 patents)

13. Marc Schlenger (5 out of 7 patents)

14. Ulrich Kiffmeier (5 out of 6 patents)

15. Karsten Fischer (5 out of 5 patents)

Core Competencies:

FPGA Programming

Control Unit Testing

Simulation Models

Signal Processing

Mechatronic Systems

Real-Time Testing

Code Generation

Control Programs

Model Configuration

Electronic Control Units

Data Object Variants

Simulation Environments

166 patents: Sort by Forward Citations

1. 11442884 - Method for programming a programmable gate array in a distributed computer system (2022-09-13),

2. 11310903 - Multi-zone heat sink for printed circuit boards (2022-04-19),

3. 11255909 - Method for synchronizing a checking apparatus, and a checking apparatus and a composite system comprising at least two checking apparatuses (2022-02-22),

4. 11238674 - Simulation of different traffic situations for a test vehicle (2022-02-01),

5. 11237832 - Module with a serialization unit and improved compatibility with deserialization units of different series (2022-02-01),

6. 11232045 - Computer-implemented method for integrating at least one signal value into a virtual control unit (2022-01-25),

7. 11222159 - Method, computer-based system and computer program product for planning partitions for a programmable gate array (2022-01-11),

8. 11194360 - Shakeproof modular computer system (2021-12-07),

9. 11187748 - Procedure for reviewing an FPGA-program (2021-11-30),

10. 11169208 - Inspection device (2021-11-09),

11. 11126408 - Incremental code generation method (2021-09-21),

12. 11074049 - Method and system for generating program code modified by rule sets (2021-07-27),

13. 11062071 - Method for simulating a dynamic system (2021-07-13),

14. 11022967 - Method for generating a technical system model, executable on a test unit, and the test unit (2021-06-01),

15. 11017141 - Method for troubleshooting the program logic of a system of distributed progammable gate arrays (2021-05-25),

Company Overview

Dspace Digital Signal Processing and Control Engineering GmbH, based in Paderborn, Germany, specializes in advanced digital signal processing technologies. The company focuses on developing solutions for FPGA programming, control unit testing, and simulation models, catering to industries that require high-performance signal processing and mechatronic systems. Their expertise extends to real-time testing and code generation, enabling the creation of robust control programs that enhance system efficiency and reliability.

Profile summary synthesized from public USPTO records and patent filings.

Company Badge

USPTO Data Jan 1 1976 - Oct 20 2026

166 Patents

#4 in Paderborn

#365 in Germany

#4,979 in the World

Paderborn, Germany

Dspace Digital Signal Processing and Control Engineering Gmbh

Forward Citations = 299

173 inventors:

Heiko Kalte (15 out of 25 patents)

Thorsten Hufnagel (11 out of 12 patents)

Marc Dressler (11 out of 14 patents)

4. Dominik Lubeley (10 out of 21 patents)

5. Wolfgang Trautmann (9 out of 9 patents)

IDiyas Innovation Intelligence. (2026). Company Patent Portfolio: Dspace Digital Signal Processing and Control Engineering Gmbh. Retrieved from https://idiyas.com/company/dspace-digital-signal-processing-and-control-engineering

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]

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