The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 30, 2021
Filed:
Oct. 28, 2019
Applicant:
Dspace Digital Signal Processing and Control Engineering Gmbh, Paderborn, DE;
Inventors:
Heiko Kalte, Paderborn, DE;
Dominik Lubeley, Paderborn, DE;
Assignee:
DSPACE DIGITAL SIGNAL PROCESSING AND CONTROL ENGINEERING GMBH, Paderborn, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/3185 (2006.01); G01R 31/3183 (2006.01); G01R 31/3193 (2006.01);
U.S. Cl.
CPC ...
G01R 31/318519 (2013.01); G01R 31/31935 (2013.01); G01R 31/318357 (2013.01);
Abstract
A method for detecting errors of a first field-programmable gate array (FPGA) program includes: receiving, by a monitoring program executed on a processor connected to an FPGA on which the first FPGA program is executed, a signal value read out from the first FPGA program; and comparing, by the monitoring program executed on the processor, the signal value to a reference value from a source other than the first FPGA program in order to detect errors of the first FPGA program.