The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 12, 2018
Filed:
Jan. 18, 2017
Applicant:
Xintec Inc., Taoyuan, TW;
Inventors:
Yen-Shih Ho, Kaohsiung, TW;
Tsang-Yu Liu, Zhubei, TW;
Chia-Sheng Lin, Taoyuan, TW;
Chaung-Lin Lai, Taoyuan, TW;
Assignee:
XINTEC INC., Taoyuan, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/78 (2006.01); H01L 21/52 (2006.01); H01L 21/54 (2006.01); H01L 23/18 (2006.01); H01L 23/055 (2006.01); H01L 21/48 (2006.01);
U.S. Cl.
CPC ...
H01L 23/562 (2013.01); H01L 21/4817 (2013.01); H01L 21/52 (2013.01); H01L 21/54 (2013.01); H01L 21/78 (2013.01); H01L 23/055 (2013.01); H01L 23/18 (2013.01); H01L 24/16 (2013.01); H01L 2224/16237 (2013.01);
Abstract
A chip package including a substrate is provided. The substrate has a first surface and a second surface opposite thereto. The substrate includes a sensing or device region which is adjacent to the first surface. A recess is in the substrate. The recess extends from the second surface towards the first surface, and vertically overlaps the sensing or device region. A redistribution layer is electrically connected to the sensing or device region, and extends from the second surface into the recess. A method of forming the chip package is also provided.