The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 12, 2018
Filed:
Dec. 14, 2016
Applicant:
Advanced Semiconductor Engineering, Inc., Kaohsiung, TW;
Inventors:
Chai-Chi Lin, Kaohsiung, TW;
Chih-Cheng Lee, Kaohsiung, TW;
Hsing Kuo Tien, Kaohsiung, TW;
Chih-Yung Yang, Kaohsiung, TW;
Assignee:
ADVANCED SEMICONDUCTOR ENGINEERING, INC., Kaohsiung, TW;
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 23/538 (2006.01); H01L 21/48 (2006.01); H01L 25/18 (2006.01); H01L 25/16 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49822 (2013.01); H01L 21/481 (2013.01); H01L 21/486 (2013.01); H01L 21/4857 (2013.01); H01L 23/49827 (2013.01); H01L 23/49838 (2013.01); H01L 23/5383 (2013.01); H01L 23/5384 (2013.01); H01L 23/5386 (2013.01); H01L 25/0655 (2013.01); H01L 25/16 (2013.01); H01L 25/18 (2013.01);
Abstract
A semiconductor substrate includes an interconnection structure and a dielectric layer. The dielectric layer surrounds the interconnection structure and defines a first cavity. The first cavity is defined by a first sidewall, a second sidewall, and a first surface of the dielectric layer. The first sidewall is laterally displaced from the second sidewall.