The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 24, 2018
Filed:
May. 24, 2016
Globalfoundries Inc., Grand Cayman, KY;
Bhupesh Chandra, Wappingers Falls, NY (US);
Claude Ortolland, Garrison, NY (US);
Gregory G. Freeman, Wappingers Falls, NY (US);
Viorel Ontalus, Hopewell Junction, NY (US);
Christopher D. Sheraw, Ballston Spa, NY (US);
Timothy J. McArdle, Ballston Lake, NY (US);
Paul Chang, Ellicott City, MD (US);
GLOBALFOUNDRIES Inc., Grand Cayman, KY;
Abstract
Chip structures and fabrication methods for forming such chip structures. A first device structure has a structural feature comprised of a first dielectric material and a second device structure has a structural feature comprised of a second dielectric material. A semiconductor layer has a first section adjacent to the structural feature of the first device structure and a second section adjacent to the structural feature of the second device structure. The first section of the semiconductor layer has a popped relationship relative to the structural feature comprised of the first dielectric material. The second section of the semiconductor layer includes a portion that has a pinned relationship relative to a portion of the structural feature comprised of the second dielectric material.