The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 17, 2018
Filed:
Jun. 27, 2017
International Business Machines Corporation, Armonk, NY (US);
Krishna R. Tunga, Wappingers Falls, NY (US);
Karen P. McLaughlin, Poughkeepsie, NY (US);
Charles L. Arvin, Poughkeepsie, NY (US);
Brian R. Sundlof, Verbank, NY (US);
Steven P. Ostrander, Poughkeepsie, NY (US);
Christopher D. Muzzy, Burlington, VT (US);
Thomas A. Wassick, LaGrangeville, NY (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A methodology and associated wafer level assembly of testing crackstop structure designs. The wafer level semiconductor assembly includes: a substrate structure shaped to define a set of horizontal directions; a metallization layer located on top of the substrate structure, with the metallization layer including a crackstop structure formed therein in accordance with a crackstop structure design; and a tensioned layer located on top of the metallization layer, with the tensioned layer being made of material having internal tensile forces oriented in the horizontal directions. The tensile forces promote horizontal direction crack propagation in the metallization layer so that the crackstop structure design can be tested more rigorously and reliably before deciding on the crackstop design structure to put into mass production (which mass produced product would typically not include the tensioned layer).