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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9728521 B1

PDFFull Text
Date of Patent:
Aug. 08, 2017

Filed:

Jul. 23, 2015

Hybrid bond using a copper alloy for yield improvement

Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Yu-Cheng Tsai, Tainan, TW;

Chun-Chieh Chuang, Tainan, TW;

Ching-Chun Wang, Tainan, TW;

Dun-Nian Yaung, Taipei, TW;

Feng-Chi Hung, Chu-Bei, TW;

Chih-Hui Huang, Yongkang, TW;

Yan-Chih Lu, Tainan, TW;

Ju-Shi Chen, Hsin-Chu, TW;

Assignee:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Attorney:

Eschweiler & Potashnik, LLC

Primary Examiner:

Caleen Sullivan

Int. Cl.
CPC ...
H01L 25/065 (2006.01); H01L 23/528 (2006.01); H01L 23/532 (2006.01); H01L 25/00 (2006.01); H01L 23/00 (2006.01); H01L 23/522 (2006.01); H01L 21/768 (2006.01); H01L 21/321 (2006.01); H01L 21/311 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); H01L 21/0214 (2013.01); H01L 21/0217 (2013.01); H01L 21/02164 (2013.01); H01L 21/31111 (2013.01); H01L 21/3212 (2013.01); H01L 21/7684 (2013.01); H01L 21/76807 (2013.01); H01L 21/76843 (2013.01); H01L 21/76871 (2013.01); H01L 21/76877 (2013.01); H01L 21/76883 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 23/53238 (2013.01); H01L 24/80 (2013.01); H01L 24/89 (2013.01); H01L 25/50 (2013.01); H01L 2224/05025 (2013.01); H01L 2224/05147 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/215 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01); H01L 2224/94 (2013.01); H01L 2225/06524 (2013.01); H01L 2924/0104 (2013.01); H01L 2924/01013 (2013.01); H01L 2924/01022 (2013.01); H01L 2924/01025 (2013.01); H01L 2924/01027 (2013.01); H01L 2924/01028 (2013.01); H01L 2924/01072 (2013.01);
Abstract

An integrated circuit (IC) using a copper-alloy based hybrid bond is provided. The IC comprises a pair of semiconductor structures vertically stacked upon one another. The pair of semiconductor structures comprise corresponding dielectric layers and corresponding metal features arranged in the dielectric layers. The metal features comprise a copper alloy having copper and a secondary metal. The IC further comprises a hybrid bond arranged at an interface between the semiconductor structures. The hybrid bond comprises a first bond bonding the dielectric layers together and a second bond bonding the metal features together. The second bond comprises voids arranged between copper grains of the metal features and filled by the secondary metal. A method for bonding a pair of semiconductor structures together using the copper-alloy based hybrid bond is also provided.

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