The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 27, 2017
Filed:
Nov. 01, 2016
Applicant:
Freescale Semiconductor, Inc., Austin, TX (US);
Inventors:
Hongning Yang, Chandler, AZ (US);
Xin Lin, Phoenix, AZ (US);
Zhihong Zhang, Chandler, AZ (US);
Jiang-kai Zuo, Chandler, AZ (US);
Assignee:
NXP USA, INC., Austin, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/062 (2012.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/08 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66681 (2013.01); H01L 29/0634 (2013.01); H01L 29/0653 (2013.01); H01L 29/0692 (2013.01); H01L 29/0847 (2013.01); H01L 29/1045 (2013.01); H01L 29/1095 (2013.01); H01L 29/7835 (2013.01);
Abstract
A device includes a semiconductor substrate, source and drain regions in the semiconductor substrate and spaced from one another along a first lateral dimension, and a drift region in the semiconductor substrate and through which charge carriers drift during operation upon application of a bias voltage between the source and drain regions. The drift region has a notched dopant profile in a second lateral dimension along an interface between the drift region and the drain region.