The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 06, 2017
Filed:
Dec. 03, 2015
Globalfoundries Singapore Pte. Ltd., Singapore, SG;
Kun Liu, Singapore, SG;
Francis Benistant, Singapore, SG;
Ming Li, Singapore, SG;
Namchil Mun, Singapore, SG;
Shiang Yang Ong, Singapore, SG;
Purakh Raj Verma, Singapore, SG;
GLOBALFOUNDRIES SINGAPORE PTE. LTD., Singapore, SG;
Abstract
Semiconductor device isolation and method of forming thereof are presented. A base substrate with lightly doped first polarity type dopants is provided. A buried layer with heavily doped second polarity type dopants is formed in a top portion of the substrate while an epitaxial layer is formed over the buried layer. First and second type deep trench isolation (DTI) structures which extend from surface of the epitaxial layer to a portion of the base substrate are formed to isolate different device regions defined in the substrate. The first and second type DTI structures have different width dimensions. Shallow trench isolation (STI) regions are formed in the epitaxial layer and at least one transistor is formed on the epitaxial layer. The first and second type DTI structures effectively isolate the transistor from other device regions and enhances the breakdown voltage.