The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 06, 2017
Filed:
Dec. 05, 2014
Applicant:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Inventors:
Mill-Jer Wang, Hsin-Chu, TW;
Chih-Chia Chen, Taipei, TW;
Hung-Chih Lin, Hsin-Chu, TW;
Ching-Nen Peng, Hsin-Chu, TW;
Hao Chen, New Taipei, TW;
Assignee:
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/20 (2006.01); G01R 31/28 (2006.01); G01R 1/073 (2006.01); H01L 21/66 (2006.01);
U.S. Cl.
CPC ...
G01R 31/2884 (2013.01); G01R 1/07378 (2013.01); G01R 31/2834 (2013.01); G01R 31/2886 (2013.01); H01L 22/14 (2013.01); Y02P 80/30 (2015.11);
Abstract
A method comprises connecting a testing setup having a plurality of probes to a device under test having a plurality of vias, wherein a probe is aligned with a corresponding via of the device under test and conducting a plurality of via electrical characteristic tests through a conductive path comprising the vias, the probes and a plurality of conductive devices, each of which connects two adjacent probes, wherein the conductive devices are in the testing setup.