The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 09, 2017

Filed:

Nov. 24, 2015
Applicants:

Elijah V. Karpov, Santa Clara, CA (US);

Brian S. Doyle, Portland, OR (US);

Charles C. Kuo, Hillsboro, OR (US);

Robert S. Chau, Beaverton, OR (US);

Eric R. Dickey, Portland, OR (US);

Michael Stephen Bowen, Milwaukie, OR (US);

Sey-shing Sun, Portland, OR (US);

Inventors:

Elijah V. Karpov, Santa Clara, CA (US);

Brian S. Doyle, Portland, OR (US);

Charles C. Kuo, Hillsboro, OR (US);

Robert S. Chau, Beaverton, OR (US);

Eric R. Dickey, Portland, OR (US);

Michael Stephen Bowen, Milwaukie, OR (US);

Sey-Shing Sun, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); H01L 45/00 (2006.01); G11C 13/00 (2006.01); H01L 27/24 (2006.01);
U.S. Cl.
CPC ...
H01L 45/08 (2013.01); G11C 13/0007 (2013.01); G11C 13/0069 (2013.01); H01L 27/2436 (2013.01); H01L 45/04 (2013.01); H01L 45/1233 (2013.01); H01L 45/146 (2013.01); H01L 45/147 (2013.01); G11C 2013/0073 (2013.01);
Abstract

Low voltage embedded memory having conductive oxide and electrode stacks is described. For example, a material layer stack for a memory element includes a first conductive electrode. A conductive oxide layer is disposed on the first conductive electrode. The conductive oxide layer has a plurality of oxygen vacancies therein. A second electrode is disposed on the conductive oxide layer.


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