The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 09, 2017
Filed:
Nov. 12, 2014
Integrated circuit packaging techniques and configurations for small form-factor or wearable devices
Intel Corporation, Santa Clara, CA (US);
Jackson Chung Peng Kong, Tanjung Tokong, MY;
Bok Eng Cheah, Bayan Lepas, MY;
Kooi Chi Ooi, Glugor, MY;
Shanggar Periaman, Gelugor, MY;
Michael P. Skinner, San Jose, CA (US);
INTEL CORPORATION, Santa Clara, CA (US);
Abstract
Embodiments of the present disclosure are directed toward integrated circuit (IC) packaging techniques and configurations for small form-factor or wearable devices. In one embodiment, an apparatus may include a substrate having a first side and a second side disposed opposite to the first side and a sidewall disposed between the first side and the second side, the sidewall defining a perimeter of the substrate, and a plurality of through-substrate vias (TSVs) disposed between the first side and the second side of the substrate, and a first dielectric layer disposed on the first side and including electrical routing features to route electrical signals of one or more dies in a plane of the first dielectric layer. Other embodiments may be described and/or claimed.