The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 20, 2016

Filed:

Jun. 27, 2013
Applicant:

Stats Chippac, Ltd., Singapore, SG;

Inventors:

JoonYoung Choi, Gyeonggi-do, KR;

YongHee Kang, Kyoungki-Do, KR;

HunTeak Lee, Gyeonggi-Do, KR;

KeonTaek Kang, Gyeonggi-do, KR;

YoungChul Kim, Gyeonggi-do, KR;

Assignee:

STATS ChipPAC Pte. Ltd., Singapore, SG;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/76 (2006.01); H01L 29/24 (2006.01); H01L 23/48 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2006.01); H01L 23/00 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 25/50 (2013.01); H01L 24/19 (2013.01); H01L 24/96 (2013.01); H01L 24/97 (2013.01); H01L 25/0655 (2013.01); H01L 21/568 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/97 (2013.01); H01L 2924/01322 (2013.01); H01L 2924/12041 (2013.01); H01L 2924/12042 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/181 (2013.01);
Abstract

A semiconductor device includes a carrier with an interface layer applied over the carrier. The interface layer can include non-conductive paste or non-conductive film. A plurality of semiconductor die is mounted to the carrier and interface layer by pressing the semiconductor die to the carrier and interface layer for one second or less, and simultaneously thermal compression bonding multiple semiconductor die to the carrier and interface layer for 5-10 seconds. By pressing the semiconductor die to the interface layer for a short period of time and then simultaneously thermal compression bonding multiple semiconductor die to the interface layer for a second longer period of time, the overall throughput of die bonding increases to process more die per unit of time. An encapsulant is deposited over the semiconductor die. The carrier is removed and interconnect structure is formed over the semiconductor die and encapsulant.


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