The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 15, 2016

Filed:

Jul. 29, 2015
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Brian S. Doyle, Portland, OR (US);

David L. Kencke, Beaverton, OR (US);

Charles C. Kuo, Hillsboro, OR (US);

Uday Shah, Portland, OR (US);

Kaan Oguz, Dublin, IE;

Mark L. Doczy, Portland, OR (US);

Satyarth Suri, Hillsboro, OR (US);

Clair Webb, Aloha, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/22 (2006.01); H01L 43/02 (2006.01); H01L 43/10 (2006.01); G11C 11/16 (2006.01); H01L 43/08 (2006.01);
U.S. Cl.
CPC ...
H01L 43/02 (2013.01); G11C 11/161 (2013.01); H01L 27/222 (2013.01); H01L 43/08 (2013.01); H01L 43/10 (2013.01);
Abstract

Perpendicular spin transfer torque memory (STTM) devices having offset cells and methods of fabricating perpendicular STTM devices having offset cells are described. For example, a spin torque transfer memory (STTM) array includes a first load line disposed above a substrate and having only a first STTM device. The STTM array also includes a second load line disposed above the substrate, adjacent the first load line, and having only a second STTM device, the second STTM device non-co-planar with the first STTM device.


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