The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 01, 2016
Filed:
Feb. 28, 2013
Applicant:
Unimicron Technology Corporation, Taoyuan, TW;
Inventors:
Tzyy-Jang Tseng, Taoyuan, TW;
Chung W. Ho, Taoyuan, TW;
Dyi-Chung Hu, Taoyuan, TW;
Huan-Ling Lee, Taoyuan, TW;
Sheng-Yuah He, Taoyuan, TW;
Assignee:
Unimicron Technology Corp., Taoyuan, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/05 (2006.01); H05K 3/46 (2006.01); H05K 3/10 (2006.01); H05K 1/02 (2006.01); H01L 21/56 (2006.01); H01L 23/14 (2006.01); H01L 23/498 (2006.01);
U.S. Cl.
CPC ...
H05K 1/05 (2013.01); H01L 21/568 (2013.01); H05K 1/02 (2013.01); H05K 3/10 (2013.01); H05K 3/4644 (2013.01); H05K 3/4682 (2013.01); H01L 23/145 (2013.01); H01L 23/49811 (2013.01); H01L 23/49827 (2013.01); H01L 2924/0002 (2013.01); H05K 1/0271 (2013.01); Y10T 29/49155 (2015.01);
Abstract
A fabrication method of a coreless packaging substrate is provided, including the steps of: forming an inner built-up circuit board on a carrier; removing the carrier; and symmetrically forming a first outer built-up structure and a second outer built-up structure on top and bottom surfaces of the inner built-up circuit board, respectively. The present invention effectively increases the product yield, saves the fabrication cost, and reduces wastes.